Benedikt Spranger
a9b71e2f8c
stm32g4: Add EXTI support
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The STM32G4xx series contain two regular EXTI v1 blocks; one at offset 0x00,
the other at offset 0x20.
Add support for EXTI.
Signed-off-by: Benedikt Spranger <b.spranger@linutronix.de >
2025-07-13 16:36:11 -07:00
johannes
d1b43a7bb9
Made adc_read_injected() return signed int because result can become negative
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Added function can_fifo_pending() - number of pending RX messages
can_receive() returns number of pending messages prior to release
2025-07-13 16:11:46 -07:00
andrewmcg1
3b892e4a18
Added functions for entering l4 power modes
2025-07-13 16:08:28 -07:00
Benedikt Spranger
8526d7095c
stm32g4: rcc: Add support for 24MHz external clocks
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The ST Nucleo 64 boards NUCLEO-G431RB, NUCLEO-G474RE and NUCLEO-G491RE
are equipped with a 24 MHz crystal. Add RCC clock support for these
boards.
Signed-off-by: Benedikt Spranger <b.spranger@linutronix.de >
2025-07-12 10:44:07 -07:00
Benedikt Spranger
f8b9b14f83
stm32g4: rcc: target stylecheck issues
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No functional change.
Signed-off-by: Benedikt Spranger <b.spranger@linutronix.de >
2025-07-12 10:44:07 -07:00
Kat
2c59c66945
stm32/l4: Create meson build system for STM32L4 series support
2025-07-12 10:32:11 -07:00
dragonmux
14e73b9ed5
stm32/h7: Created a meson build system for the STM32H7 series support
2025-07-12 10:32:11 -07:00
dragonmux
7c47fa8fd0
lm4f: Created a meson build system for the Tiva-C series support
2025-07-12 10:32:11 -07:00
dragonmux
c2ecd4545a
stm32/f7: Created a meson build system for the STM32F7 series support
2025-07-12 10:32:11 -07:00
dragonmux
6a61af6c75
stm32/f4: Created a meson build system for the STM32F4 series support
2025-07-12 10:32:11 -07:00
dragonmux
80cf453429
stm32/f3: Created a meson build system for the STM32F3 series support
2025-07-12 10:32:11 -07:00
dragonmux
4403f2a130
stm32/f0: Created a meson build system for the STM32F0 series support
2025-07-12 10:32:11 -07:00
dragonmux
04977998c2
misc: Implemented an 'all' mode for the Meson build system
2025-07-12 10:32:11 -07:00
dragonmux
0c3c7cc907
include: Created a Meson build system for the libopencm3 include tree
2025-07-12 10:32:11 -07:00
ALTracer
cb1fe86008
stm32: usart_common_all: Implement usart_get_baudrate
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* Handle OVER8 when set, as 2x clock
* Handle LPUART specially, as 256x clock, without overflowing uint32_t
2025-07-12 13:39:32 +01:00
ALTracer
9059ec1a42
lm4f/uart: Implement uart_get_baudrate
2025-07-12 13:39:32 +01:00
Pavol Rusnak
754dac7686
usb:msc: use new email for contributor
2025-07-11 21:13:13 -07:00
Mateusz Myalski
cc3a1e8a98
Added timer support
2025-07-11 20:31:43 -07:00
Mateusz Myalski
ab284959f3
Added Exti support
2025-07-11 20:31:43 -07:00
Mateusz Myalski
3f5e250f42
Added iwdg support + early wakeup
2025-07-11 20:31:43 -07:00
Mateusz Myalski
edbb8ed7e3
Added I2C stm32u5_support
...
Tested I2C master mode on 16MHz HSI
2025-07-11 20:31:43 -07:00
Mateusz Myalski
e6632cda77
Added support for USARTs and clock setup
...
Tested:
- USART2 Rx/Tx with:
- In 8N1 115200
- With sysclk set as HSI and default setup
- With all clk input types for USART2
2025-07-11 20:31:43 -07:00
Mateusz Myalski
730cfec66c
Add IRQ handlers and missing Makefile FP flags
2025-07-11 20:31:43 -07:00
Mateusz Myalski
4d442299fe
Add irq/memorymap/rcc
2025-07-11 20:31:43 -07:00
Mateusz Myalski
3324dd4069
Revert invalid change in gd32
2025-07-11 20:31:43 -07:00
Mateusz Myalski
90cfa21a05
Added minimal memory map gpi and rcc to blink LED
2025-07-11 20:31:43 -07:00
Mateusz Myalski
236426f0ff
Added minimal memory map
2025-07-11 20:31:43 -07:00
Mateusz Myalski
6bcdb117b7
Added device family to linker generator
2025-07-11 20:31:43 -07:00
dragonmux
48cc714746
stm32/h7: Implemented a function for getting back a bank's status flags
2025-07-11 20:26:35 -07:00
dragonmux
3a1b9861c7
stm32/h7: Added a definition for the "NULL" DMAMUX request source ID
2025-07-11 20:26:35 -07:00
dragonmux
79dfe1c284
stm32/h7: Fixed all the DMAMUX1 channel values being off-by-one due to a rogue - 1 in the DMAMUX_CxCR() macro
2025-07-11 20:26:35 -07:00
dragonmux
38523d5878
cm3/common: Fixed the bit macros doing bad things with signed bit shifting
2025-07-11 20:26:35 -07:00
dragonmux
2a6059540d
stm32/h7: Implemented support for enabling the RTC clock source and peripheral
2025-07-11 20:26:35 -07:00
dragonmux
8268fb2e29
stm32/h7: Added some missing decls for the USB clock selections
2025-07-11 20:26:35 -07:00
dragonmux
26cb7f0ded
stm32/h7: Implemented support for the LSI clock source
2025-07-11 20:26:35 -07:00
dragonmux
683c35de54
stm32/common: Fixed a boat load of signed bit manipulation issues
2025-07-11 20:26:35 -07:00
dragonmux
94247aedda
stm32/h7: Enabled support for the RTC
2025-07-11 20:26:35 -07:00
dragonmux
777dd14a7a
stm32/h7: Added some missing definitions for the PWR_CPUCR
2025-07-11 20:26:35 -07:00
dragonmux
7047e3d01c
stm32/h7: Implemented support for DMAMUX1
2025-07-11 20:26:35 -07:00
dragonmux
c0cd79359d
stm32/h7: Enabled the main DMA controllers
2025-07-11 20:26:35 -07:00
dragonmux
9087802ce7
stm32/h7: Enabled the CRC32 generator peripheral
2025-07-11 20:26:35 -07:00
dragonmux
c13dd75d55
stm32/common: Fixed some of the Flash headers defining constants in UB ways
2025-07-11 20:26:35 -07:00
dragonmux
94411df91f
stm32/common: Implemented oversampling control support for the F2/F4 parts
2025-07-11 20:26:35 -07:00
dragonmux
6031fd8007
stm32/h7: Added a missing Flash ACR WRHF value
2025-07-11 20:26:35 -07:00
dragonmux
c5825de272
stm32/h7: Fixed some signed-unsigned issues in the RCC header
2025-07-11 20:26:35 -07:00
dragonmux
80ffd05933
stm32/h7: Fixed an issue with the naming of the D2CCIP2R selector constant for some of the USARTs
2025-07-11 20:26:35 -07:00
dragonmux
2d15b12ff2
stm32/common: Implement handling for setting the baud rate correctly when in 8x oversampling mode
2025-07-11 20:26:35 -07:00
dragonmux
9480f493b9
stm32/common: Implement support for DE and changing the oversampling mode
2025-07-11 20:26:35 -07:00
dragonmux
b622d4b555
stm32/h7: Implemented handling for bringing up the 3.3V USB voltage supply
2025-07-11 20:26:35 -07:00
dragonmux
c3d972632a
usb/dwc: Fixed how the endpoints were configured and brought up during endpoint setup for the H7
2025-07-11 20:26:35 -07:00
