Required so that the common uart infrastructure can be updated. This was
the last family to receive this implementation.
Signed-off-by: Karl Palsson <karlp@tweak.au>
Follow HACKING specifications, be consistent with all other parts.
Yes, the SEL suffix is kinda superfluous, but it's _consistent_ which is
why we do it.
Signed-off-by: Karl Palsson <karlp@tweak.au>
CCR register definitions were completely wrong, both decimal/hex mixups,
and straightup transcriptions from the reference manual errors.
Unify the styles for both g0 and g4, using the same (duplicated)
function for both implmentations.
Reviewed-by: Karl Palsson <karlp@tweak.au>
Added some descriptions for missing parameters, (hopefully) clarified
some along the way. Fixed all can related warnings in doxygen logs.
Added doxgen tags where meaningful comments had been provided. Dropped
redundant comment separators.
Add stm32h7 support for FDCAN peripheral. Source level compatibility is
provided with stm32g4. Additional features of stm32h7 such as
configurable buffers are supported. Implementation offers feature parity
with stm32g4 implementation.
Add stm32g4 support for FDCAN peripheral. Normal / FDCAN operation
supported, bitrate switching and filtering supported via API.
Timestamping and transmit event buffer support in API are TBD.
Originally tracked as: https://github.com/libopencm3/libopencm3/pull/1317
Reviewed-by: Karl Palsson <karlp@tweak.net.au>
