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stm32/timer: Moved the OC4 mode logic into its own function

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This commit is contained in:
dragonmux
2023-09-26 21:43:00 +01:00
committed by Piotr Esden-Tempski
parent 1254cb8cc8
commit 345b20fb9f
1 changed files with 35 additions and 31 deletions
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66
lib/stm32/common/timer_common_all.c
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@@ -932,6 +932,40 @@ void timer_set_oc3_mode(uint32_t timer_peripheral, enum tim_oc_mode oc_mode)
}
}
void timer_set_oc4_mode(uint32_t timer_peripheral, enum tim_oc_mode oc_mode)
{
TIM_CCMR2(timer_peripheral) &= ~TIM_CCMR2_CC4S_MASK;
TIM_CCMR2(timer_peripheral) |= TIM_CCMR2_CC4S_OUT;
TIM_CCMR2(timer_peripheral) &= ~TIM_CCMR2_OC4M_MASK;
switch (oc_mode) {
case TIM_OCM_FROZEN:
TIM_CCMR2(timer_peripheral) |= TIM_CCMR2_OC4M_FROZEN;
break;
case TIM_OCM_ACTIVE:
TIM_CCMR2(timer_peripheral) |= TIM_CCMR2_OC4M_ACTIVE;
break;
case TIM_OCM_INACTIVE:
TIM_CCMR2(timer_peripheral) |= TIM_CCMR2_OC4M_INACTIVE;
break;
case TIM_OCM_TOGGLE:
TIM_CCMR2(timer_peripheral) |= TIM_CCMR2_OC4M_TOGGLE;
break;
case TIM_OCM_FORCE_LOW:
TIM_CCMR2(timer_peripheral) |= TIM_CCMR2_OC4M_FORCE_LOW;
break;
case TIM_OCM_FORCE_HIGH:
TIM_CCMR2(timer_peripheral) |=
TIM_CCMR2_OC4M_FORCE_HIGH;
break;
case TIM_OCM_PWM1:
TIM_CCMR2(timer_peripheral) |= TIM_CCMR2_OC4M_PWM1;
break;
case TIM_OCM_PWM2:
TIM_CCMR2(timer_peripheral) |= TIM_CCMR2_OC4M_PWM2;
break;
}
}
/*---------------------------------------------------------------------------*/
/** @brief Timer Set Output Compare Mode
@@ -973,36 +1007,7 @@ void timer_set_oc_mode(uint32_t timer_peripheral, enum tim_oc_id oc_id,
timer_set_oc3_mode(timer_peripheral, oc_mode);
break;
case TIM_OC4:
TIM_CCMR2(timer_peripheral) &= ~TIM_CCMR2_CC4S_MASK;
TIM_CCMR2(timer_peripheral) |= TIM_CCMR2_CC4S_OUT;
TIM_CCMR2(timer_peripheral) &= ~TIM_CCMR2_OC4M_MASK;
switch (oc_mode) {
case TIM_OCM_FROZEN:
TIM_CCMR2(timer_peripheral) |= TIM_CCMR2_OC4M_FROZEN;
break;
case TIM_OCM_ACTIVE:
TIM_CCMR2(timer_peripheral) |= TIM_CCMR2_OC4M_ACTIVE;
break;
case TIM_OCM_INACTIVE:
TIM_CCMR2(timer_peripheral) |= TIM_CCMR2_OC4M_INACTIVE;
break;
case TIM_OCM_TOGGLE:
TIM_CCMR2(timer_peripheral) |= TIM_CCMR2_OC4M_TOGGLE;
break;
case TIM_OCM_FORCE_LOW:
TIM_CCMR2(timer_peripheral) |= TIM_CCMR2_OC4M_FORCE_LOW;
break;
case TIM_OCM_FORCE_HIGH:
TIM_CCMR2(timer_peripheral) |=
TIM_CCMR2_OC4M_FORCE_HIGH;
break;
case TIM_OCM_PWM1:
TIM_CCMR2(timer_peripheral) |= TIM_CCMR2_OC4M_PWM1;
break;
case TIM_OCM_PWM2:
TIM_CCMR2(timer_peripheral) |= TIM_CCMR2_OC4M_PWM2;
break;
}
timer_set_oc4_mode(timer_peripheral, oc_mode);
break;
case TIM_OC1N:
case TIM_OC2N:
@@ -1899,4 +1904,3 @@ void timer_slave_set_extclockmode2(uint32_t timer_peripheral,
/* TODO Timer DMA burst */
/**@}*/