STM32L1 has a different set of offsets, not just a different base address, so we can't have common registers definitions. Also, out of F0,F1,F2,F3,F4,L1, only the F1 has the odd note about 2x16bit registers and 2x32bit registers with one 16bit register marked as "This field value is also reserved for a future feature." Therefore, replace the awkward reading out as multiple words and just copy them in. F0,F2,F3,F4 were missing definitions altogether. This does _not_ attempt to address the problem of the mismatched base addresses for Medium+ and High Density L1 parts.
1.5 KiB
1.5 KiB