987 Commits

Author SHA1 Message Date
Benedikt Spranger
a9b71e2f8c stm32g4: Add EXTI support
The STM32G4xx series contain two regular EXTI v1 blocks; one at offset 0x00,
the other at offset 0x20.
Add support for EXTI.

Signed-off-by: Benedikt Spranger <b.spranger@linutronix.de>
2025-07-13 16:36:11 -07:00
jsphuebner
886cd116ff Corrected documentation for adc_read_injected 2025-07-13 16:11:46 -07:00
johannes
d1b43a7bb9 Made adc_read_injected() return signed int because result can become negative
Added function can_fifo_pending() - number of pending RX messages
can_receive() returns number of pending messages prior to release
2025-07-13 16:11:46 -07:00
andrewmcg1
3b892e4a18 Added functions for entering l4 power modes 2025-07-13 16:08:28 -07:00
Benedikt Spranger
8526d7095c stm32g4: rcc: Add support for 24MHz external clocks
The ST Nucleo 64 boards NUCLEO-G431RB, NUCLEO-G474RE and NUCLEO-G491RE
are equipped with a 24 MHz crystal. Add RCC clock support for these
boards.

Signed-off-by: Benedikt Spranger <b.spranger@linutronix.de>
2025-07-12 10:44:07 -07:00
Benedikt Spranger
f8b9b14f83 stm32g4: rcc: target stylecheck issues
No functional change.

Signed-off-by: Benedikt Spranger <b.spranger@linutronix.de>
2025-07-12 10:44:07 -07:00
Kat
2c59c66945 stm32/l4: Create meson build system for STM32L4 series support 2025-07-12 10:32:11 -07:00
dragonmux
14e73b9ed5 stm32/h7: Created a meson build system for the STM32H7 series support 2025-07-12 10:32:11 -07:00
dragonmux
c2ecd4545a stm32/f7: Created a meson build system for the STM32F7 series support 2025-07-12 10:32:11 -07:00
dragonmux
6a61af6c75 stm32/f4: Created a meson build system for the STM32F4 series support 2025-07-12 10:32:11 -07:00
dragonmux
80cf453429 stm32/f3: Created a meson build system for the STM32F3 series support 2025-07-12 10:32:11 -07:00
dragonmux
4403f2a130 stm32/f0: Created a meson build system for the STM32F0 series support 2025-07-12 10:32:11 -07:00
dragonmux
04977998c2 misc: Implemented an 'all' mode for the Meson build system 2025-07-12 10:32:11 -07:00
dragonmux
09cfd1bccd stm32: Created a Meson build system for the STM32 support 2025-07-12 10:32:11 -07:00
dragonmux
4cbdba2d31 stm32/f1: Created a Meson build system for the STM32F1 series support 2025-07-12 10:32:11 -07:00
dragonmux
3e34a52db5 stm32/common: Created a Meson build system for common part of STM32 targets 2025-07-12 10:32:11 -07:00
ALTracer
cb1fe86008 stm32: usart_common_all: Implement usart_get_baudrate
* Handle OVER8 when set, as 2x clock
* Handle LPUART specially, as 256x clock, without overflowing uint32_t
2025-07-12 13:39:32 +01:00
fenugrec
a7632df7f4 iwdg: START and UNLOCK values before polling Busy
With code that uses IWDG and these operations:

- user code initializes iwdg
- user code jumps to USB-DFU
- USB host triggers a USB exit (e.g. after reflashing, or even just a
  dummy dfu-util Reset/Exit command)
- user code will hang in iwdg_prescaler_busy() called from
  iwdg_set_period_ms()
2025-07-11 21:05:58 -07:00
Mateusz Myalski
cc3a1e8a98 Added timer support 2025-07-11 20:31:43 -07:00
Mateusz Myalski
ab284959f3 Added Exti support 2025-07-11 20:31:43 -07:00
Mateusz Myalski
3f5e250f42 Added iwdg support + early wakeup 2025-07-11 20:31:43 -07:00
Mateusz Myalski
edbb8ed7e3 Added I2C stm32u5_support
Tested I2C master mode on 16MHz HSI
2025-07-11 20:31:43 -07:00
Mateusz Myalski
e6632cda77 Added support for USARTs and clock setup
Tested:
- USART2 Rx/Tx with:
    - In 8N1 115200
    - With sysclk set as HSI and default setup
    - With all clk input types for USART2
2025-07-11 20:31:43 -07:00
Mateusz Myalski
730cfec66c Add IRQ handlers and missing Makefile FP flags 2025-07-11 20:31:43 -07:00
Mateusz Myalski
4d442299fe Add irq/memorymap/rcc 2025-07-11 20:31:43 -07:00
dragonmux
48cc714746 stm32/h7: Implemented a function for getting back a bank's status flags 2025-07-11 20:26:35 -07:00
dragonmux
2a6059540d stm32/h7: Implemented support for enabling the RTC clock source and peripheral 2025-07-11 20:26:35 -07:00
dragonmux
bf7929b723 stm32/h7: Fixed the consistency of the function definitions in the RCC implementation 2025-07-11 20:26:35 -07:00
dragonmux
26cb7f0ded stm32/h7: Implemented support for the LSI clock source 2025-07-11 20:26:35 -07:00
dragonmux
7047e3d01c stm32/h7: Implemented support for DMAMUX1 2025-07-11 20:26:35 -07:00
dragonmux
c0cd79359d stm32/h7: Enabled the main DMA controllers 2025-07-11 20:26:35 -07:00
dragonmux
9087802ce7 stm32/h7: Enabled the CRC32 generator peripheral 2025-07-11 20:26:35 -07:00
dragonmux
94411df91f stm32/common: Implemented oversampling control support for the F2/F4 parts 2025-07-11 20:26:35 -07:00
dragonmux
03a884bcca stm32/h7: Fixed an issue with how the RCC implementation decides which VCO to use in a given PLL 2025-07-11 20:26:35 -07:00
dragonmux
0685d162df stm32/h7: Fixed the accuracy of all the RCC clock frequency calculations as the Hz->MHz conversion was discarding too much information 2025-07-11 20:26:35 -07:00
dragonmux
10acaab08b stm32/h7: Fixed a couple of issues with the clock selector handling for the USARTs and peripherals 2025-07-11 20:26:35 -07:00
dragonmux
74ffe55dc5 stm32/h7: Fixed an accuracy issue in the PLL clock input frequency calculation that resulted in all the follow-on calculations being way off in value 2025-07-11 20:26:35 -07:00
dragonmux
80ffd05933 stm32/h7: Fixed an issue with the naming of the D2CCIP2R selector constant for some of the USARTs 2025-07-11 20:26:35 -07:00
dragonmux
2d15b12ff2 stm32/common: Implement handling for setting the baud rate correctly when in 8x oversampling mode 2025-07-11 20:26:35 -07:00
dragonmux
9480f493b9 stm32/common: Implement support for DE and changing the oversampling mode 2025-07-11 20:26:35 -07:00
dragonmux
b622d4b555 stm32/h7: Implemented handling for bringing up the 3.3V USB voltage supply 2025-07-11 20:26:35 -07:00
dragonmux
972d408ba5 stm32/h7: Implemented support changing the clock routed to the USB peripherals in the RCC 2025-07-11 20:26:35 -07:00
dragonmux
2b6eb047e0 stm32/h7: Implemented support for the HSI48 2025-07-11 20:26:35 -07:00
dragonmux
9f8ce70771 stm32/h7: Enabled support for the CRS controller 2025-07-11 20:26:35 -07:00
dragonmux
cdd8f2adac stm32/h7: Implemented support for the Flash controller having untangled the previous pretending it was the F2/F4 controller mess 2025-07-11 20:26:35 -07:00
dragonmux
83e571db67 stm32/h7: Fixed the QuadSPI headers not working with multiple peripehrals 2025-07-11 20:26:35 -07:00
dragonmux
c38a37c387 stm32/h7: Sorted a couple of missing peripheral register clock set cases 2025-07-11 20:26:35 -07:00
dragonmux
93423cbd9b stm32/h7: Enabled DWC2-based USB support for the platform 2025-07-11 20:26:35 -07:00
blutack
bb152f3ab7 Enable fifos on G4 2025-07-11 19:28:40 -07:00
dragonmux
547b7c0e72 stm32/st_usbfs_v2: Fixed the use of pointer maths on void pointers in the packet I/O code 2025-07-11 19:18:13 -07:00