stm32: Define FLASH_BASE and PERIPH_BASE for all families

FLASH_BASE was already defined for some and PERIPH_BASE for all but one,
but this makes these available for all families. Note that the value is
identical for all familes (I doublechecked the more exotic ones such
STM32H7), but it is still useful to have these defines to make code more
readable and so that libopencm3 users can write portable code without
having to check that these are identical on all STM32 families.
This commit is contained in:
Matthijs Kooijman
2021-04-24 19:09:33 +02:00
parent 504dc95d9b
commit fe52fcdb1a
10 changed files with 11 additions and 0 deletions

View File

@@ -25,6 +25,7 @@
/* --- STM32F20x specific peripheral definitions --------------------------- */
/* Memory map for all busses */
#define FLASH_BASE (0x08000000U)
#define PERIPH_BASE (0x40000000U)
#define PERIPH_BASE_APB1 (PERIPH_BASE + 0x00000)
#define PERIPH_BASE_APB2 (PERIPH_BASE + 0x10000)

View File

@@ -27,6 +27,7 @@
/* --- STM32F3 specific peripheral definitions ----------------------------- */
/* Memory map for all busses */
#define FLASH_BASE (0x08000000U)
#define PERIPH_BASE (0x40000000U)
#define PERIPH_BASE_APB1 (PERIPH_BASE + 0x00000)
#define PERIPH_BASE_APB2 (PERIPH_BASE + 0x10000)

View File

@@ -25,6 +25,7 @@
/* --- STM32F4 specific peripheral definitions ----------------------------- */
/* Memory map for all busses */
#define FLASH_BASE (0x08000000U)
#define PERIPH_BASE (0x40000000U)
#define PERIPH_BASE_APB1 (PERIPH_BASE + 0x00000)
#define PERIPH_BASE_APB2 (PERIPH_BASE + 0x10000)

View File

@@ -23,6 +23,7 @@
/* --- STM32F7 specific peripheral definitions ----------------------------- */
/* Memory map for all busses */
#define FLASH_BASE (0x08000000U)
#define PERIPH_BASE (0x40000000U)
#define PERIPH_BASE_APB1 (PERIPH_BASE + 0x00000)
#define PERIPH_BASE_APB2 (PERIPH_BASE + 0x10000)

View File

@@ -20,6 +20,7 @@
#include <libopencm3/cm3/memorymap.h>
#define FLASH_BASE (0x08000000U)
#define PERIPH_BASE (0x40000000U)
#define IOPORT_BASE (0x50000000U)
#define INFO_BASE (0x1fff7500U)

View File

@@ -20,6 +20,8 @@
#include <libopencm3/cm3/memorymap.h>
#define FLASH_BASE (0x08000000U)
#define PERIPH_BASE (0x40000000U)
#define INFO_BASE (0x1fff0000U)
#define PERIPH_BASE_APB1 (0x40000000U)
#define PERIPH_BASE_APB2 (0x40010000U)

View File

@@ -23,6 +23,7 @@
/* --- STM32H7 specific peripheral definitions ----------------------------- */
/* Memory map for all busses */
#define FLASH_BASE 0x08000000U
#define PERIPH_BASE 0x40000000U
#define PERIPH_BASE_APB1 0x40000000U
#define PERIPH_BASE_APB2 0x40010000U

View File

@@ -23,6 +23,7 @@
/* --- STM32 specific peripheral definitions ------------------------------- */
/* Memory map for all busses */
#define FLASH_BASE (0x08000000U)
#define PERIPH_BASE (0x40000000U)
#define IOPORT_BASE (0x50000000U)
#define INFO_BASE (0x1ff80000U)

View File

@@ -26,6 +26,7 @@
/* --- STM32 specific peripheral definitions ------------------------------- */
/* Memory map for all busses */
#define FLASH_BASE (0x08000000U)
#define PERIPH_BASE (0x40000000U)
#define INFO_BASE (0x1ff00000U)
#define PERIPH_BASE_APB1 (PERIPH_BASE + 0x00000)

View File

@@ -23,6 +23,7 @@
/* --- STM32 specific peripheral definitions ------------------------------- */
/* Memory map for all busses */
#define FLASH_BASE (0x08000000U)
#define PERIPH_BASE (0x40000000U)
#define FMC1_BANK_BASE (0x60000000U)
#define FMC3_BANK_BASE (0x80000000U)