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Added UART4 and UART5 gpio definitions for stm32f1. Also corrected the naming everywhere. Both peripherals are UARTS not U_S_ARTS.

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This commit is contained in:
Piotr Esden-Tempski
2011-11-14 04:05:35 -08:00
parent 608ca2a811
commit c6f30043fd
10 changed files with 48 additions and 40 deletions
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8
include/libopencm3/stm32/f1/gpio.h
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@@ -174,6 +174,14 @@
#define GPIO_TIM1_FR_CH2N GPIO10 /* PE10 */
#define GPIO_TIM1_FR_CH3N GPIO12 /* PE12 */
/* UART5 */
#define GPIO_UART5_TX GPIO12 /* PC12 */
#define GPIO_UART5_RX GPIO2 /* PD2 */
/* UART4 */
#define GPIO_UART4_TX GPIO10 /* PC10 */
#define GPIO_UART4_RX GPIO11 /* PC11 */
/* USART3 */
#define GPIO_USART3_TX GPIO10 /* PB10 */
#define GPIO_USART3_RX GPIO11 /* PB11 */

4
include/libopencm3/stm32/f1/nvic_f1.h
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@@ -79,8 +79,8 @@
#define NVIC_SDIO_IRQ 49
#define NVIC_TIM5_IRQ 50
#define NVIC_SPI3_IRQ 51
#define NVIC_USART4_IRQ 52
#define NVIC_USART5_IRQ 53
#define NVIC_UART4_IRQ 52
#define NVIC_UART5_IRQ 53
#define NVIC_TIM6_IRQ 54
#define NVIC_TIM7_IRQ 55
#define NVIC_DMA2_CHANNEL1_IRQ 56

8
include/libopencm3/stm32/f1/rcc.h
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@@ -214,8 +214,8 @@
#define RCC_APB1RSTR_USBRST (1 << 23) /* (XX) */
#define RCC_APB1RSTR_I2C2RST (1 << 22)
#define RCC_APB1RSTR_I2C1RST (1 << 21)
#define RCC_APB1RSTR_USART5RST (1 << 20)
#define RCC_APB1RSTR_USART4RST (1 << 19)
#define RCC_APB1RSTR_UART5RST (1 << 20)
#define RCC_APB1RSTR_UART4RST (1 << 19)
#define RCC_APB1RSTR_USART3RST (1 << 18)
#define RCC_APB1RSTR_USART2RST (1 << 17)
#define RCC_APB1RSTR_SPI3RST (1 << 15)
@@ -271,8 +271,8 @@
#define RCC_APB1ENR_USBEN (1 << 23) /* (XX) */
#define RCC_APB1ENR_I2C2EN (1 << 22)
#define RCC_APB1ENR_I2C1EN (1 << 21)
#define RCC_APB1ENR_USART5EN (1 << 20)
#define RCC_APB1ENR_USART4EN (1 << 19)
#define RCC_APB1ENR_UART5EN (1 << 20)
#define RCC_APB1ENR_UART4EN (1 << 19)
#define RCC_APB1ENR_USART3EN (1 << 18)
#define RCC_APB1ENR_USART2EN (1 << 17)
#define RCC_APB1ENR_SPI3EN (1 << 15)

4
include/libopencm3/stm32/f2/nvic_f2.h
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@@ -79,8 +79,8 @@
#define NVIC_SDIO_IRQ 49
#define NVIC_TIM5_IRQ 50
#define NVIC_SPI3_IRQ 51
#define NVIC_USART4_IRQ 52
#define NVIC_USART5_IRQ 53
#define NVIC_UART4_IRQ 52
#define NVIC_UART5_IRQ 53
#define NVIC_TIM6_DAC_IRQ 54
#define NVIC_TIM7_IRQ 55
#define NVIC_DMA2_STREAM0_IRQ 56

12
include/libopencm3/stm32/f2/rcc.h
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@@ -223,8 +223,8 @@
#define RCC_APB1RSTR_I2C3RST (1 << 23)
#define RCC_APB1RSTR_I2C2RST (1 << 22)
#define RCC_APB1RSTR_I2C1RST (1 << 21)
#define RCC_APB1RSTR_USART5RST (1 << 20)
#define RCC_APB1RSTR_USART4RST (1 << 19)
#define RCC_APB1RSTR_UART5RST (1 << 20)
#define RCC_APB1RSTR_UART4RST (1 << 19)
#define RCC_APB1RSTR_USART3RST (1 << 18)
#define RCC_APB1RSTR_USART2RST (1 << 17)
#define RCC_APB1RSTR_SPI3RST (1 << 15)
@@ -297,8 +297,8 @@
#define RCC_APB1ENR_I2C3EN (1 << 23)
#define RCC_APB1ENR_I2C2EN (1 << 22)
#define RCC_APB1ENR_I2C1EN (1 << 21)
#define RCC_APB1ENR_USART5EN (1 << 20)
#define RCC_APB1ENR_USART4EN (1 << 19)
#define RCC_APB1ENR_UART5EN (1 << 20)
#define RCC_APB1ENR_UART4EN (1 << 19)
#define RCC_APB1ENR_USART3EN (1 << 18)
#define RCC_APB1ENR_USART2EN (1 << 17)
#define RCC_APB1ENR_SPI3EN (1 << 15)
@@ -376,8 +376,8 @@
#define RCC_APB1LPENR_I2C3LPEN (1 << 23)
#define RCC_APB1LPENR_I2C2LPEN (1 << 22)
#define RCC_APB1LPENR_I2C1LPEN (1 << 21)
#define RCC_APB1LPENR_USART5LPEN (1 << 20)
#define RCC_APB1LPENR_USART4LPEN (1 << 19)
#define RCC_APB1LPENR_UART5LPEN (1 << 20)
#define RCC_APB1LPENR_UART4LPEN (1 << 19)
#define RCC_APB1LPENR_USART3LPEN (1 << 18)
#define RCC_APB1LPENR_USART2LPEN (1 << 17)
#define RCC_APB1LPENR_SPI3LPEN (1 << 15)

4
include/libopencm3/stm32/f4/nvic_f4.h
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@@ -79,8 +79,8 @@
#define NVIC_SDIO_IRQ 49
#define NVIC_TIM5_IRQ 50
#define NVIC_SPI3_IRQ 51
#define NVIC_USART4_IRQ 52
#define NVIC_USART5_IRQ 53
#define NVIC_UART4_IRQ 52
#define NVIC_UART5_IRQ 53
#define NVIC_TIM6_DAC_IRQ 54
#define NVIC_TIM7_IRQ 55
#define NVIC_DMA2_STREAM0_IRQ 56

12
include/libopencm3/stm32/f4/rcc.h
View File

@@ -224,8 +224,8 @@
#define RCC_APB1RSTR_I2C3RST (1 << 23)
#define RCC_APB1RSTR_I2C2RST (1 << 22)
#define RCC_APB1RSTR_I2C1RST (1 << 21)
#define RCC_APB1RSTR_USART5RST (1 << 20)
#define RCC_APB1RSTR_USART4RST (1 << 19)
#define RCC_APB1RSTR_UART5RST (1 << 20)
#define RCC_APB1RSTR_UART4RST (1 << 19)
#define RCC_APB1RSTR_USART3RST (1 << 18)
#define RCC_APB1RSTR_USART2RST (1 << 17)
#define RCC_APB1RSTR_SPI3RST (1 << 15)
@@ -298,8 +298,8 @@
#define RCC_APB1ENR_I2C3EN (1 << 23)
#define RCC_APB1ENR_I2C2EN (1 << 22)
#define RCC_APB1ENR_I2C1EN (1 << 21)
#define RCC_APB1ENR_USART5EN (1 << 20)
#define RCC_APB1ENR_USART4EN (1 << 19)
#define RCC_APB1ENR_UART5EN (1 << 20)
#define RCC_APB1ENR_UART4EN (1 << 19)
#define RCC_APB1ENR_USART3EN (1 << 18)
#define RCC_APB1ENR_USART2EN (1 << 17)
#define RCC_APB1ENR_SPI3EN (1 << 15)
@@ -377,8 +377,8 @@
#define RCC_APB1LPENR_I2C3LPEN (1 << 23)
#define RCC_APB1LPENR_I2C2LPEN (1 << 22)
#define RCC_APB1LPENR_I2C1LPEN (1 << 21)
#define RCC_APB1LPENR_USART5LPEN (1 << 20)
#define RCC_APB1LPENR_USART4LPEN (1 << 19)
#define RCC_APB1LPENR_UART5LPEN (1 << 20)
#define RCC_APB1LPENR_UART4LPEN (1 << 19)
#define RCC_APB1LPENR_USART3LPEN (1 << 18)
#define RCC_APB1LPENR_USART2LPEN (1 << 17)
#define RCC_APB1LPENR_SPI3LPEN (1 << 15)

12
lib/stm32/f1/vector.c
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@@ -88,8 +88,8 @@ void WEAK fsmc_isr(void);
void WEAK sdio_isr(void);
void WEAK tim5_isr(void);
void WEAK spi3_isr(void);
void WEAK usart4_isr(void);
void WEAK usart5_isr(void);
void WEAK uart4_isr(void);
void WEAK uart5_isr(void);
void WEAK tim6_isr(void);
void WEAK tim7_isr(void);
void WEAK dma2_channel1_isr(void);
@@ -173,8 +173,8 @@ void (*const vector_table[]) (void) = {
sdio_isr,
tim5_isr,
spi3_isr,
usart4_isr,
usart5_isr,
uart4_isr,
uart5_isr,
tim6_isr,
tim7_isr,
dma2_channel1_isr,
@@ -278,8 +278,8 @@ void null_handler(void)
#pragma weak sdio_isr = null_handler
#pragma weak tim5_isr = null_handler
#pragma weak spi3_isr = null_handler
#pragma weak usart4_isr = null_handler
#pragma weak usart5_isr = null_handler
#pragma weak uart4_isr = null_handler
#pragma weak uart5_isr = null_handler
#pragma weak tim6_isr = null_handler
#pragma weak tim7_isr = null_handler
#pragma weak dma2_channel1_isr = null_handler

12
lib/stm32/f2/vector.c
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@@ -90,8 +90,8 @@ void WEAK fsmc_isr(void);
void WEAK sdio_isr(void);
void WEAK tim5_isr(void);
void WEAK spi3_isr(void);
void WEAK usart4_isr(void);
void WEAK usart5_isr(void);
void WEAK uart4_isr(void);
void WEAK uart5_isr(void);
void WEAK tim6_dac_isr(void);
void WEAK tim7_isr(void);
void WEAK dma2_stream0_isr(void);
@@ -187,8 +187,8 @@ void (*const vector_table[]) (void) = {
sdio_isr,
tim5_isr,
spi3_isr,
usart4_isr,
usart5_isr,
uart4_isr,
uart5_isr,
tim6_dac_isr,
tim7_isr,
dma2_stream0_isr,
@@ -305,8 +305,8 @@ void null_handler(void)
#pragma weak sdio_isr = null_handler
#pragma weak tim5_isr = null_handler
#pragma weak spi3_isr = null_handler
#pragma weak usart4_isr = null_handler
#pragma weak usart5_isr = null_handler
#pragma weak uart4_isr = null_handler
#pragma weak uart5_isr = null_handler
#pragma weak tim6_dac_isr = null_handler
#pragma weak tim7_isr = null_handler
#pragma weak dma2_stream0_isr = null_handler

12
lib/stm32/f4/vector.c
View File

@@ -90,8 +90,8 @@ void WEAK fsmc_isr(void);
void WEAK sdio_isr(void);
void WEAK tim5_isr(void);
void WEAK spi3_isr(void);
void WEAK usart4_isr(void);
void WEAK usart5_isr(void);
void WEAK uart4_isr(void);
void WEAK uart5_isr(void);
void WEAK tim6_dac_isr(void);
void WEAK tim7_isr(void);
void WEAK dma2_stream0_isr(void);
@@ -187,8 +187,8 @@ void (*const vector_table[]) (void) = {
sdio_isr,
tim5_isr,
spi3_isr,
usart4_isr,
usart5_isr,
uart4_isr,
uart5_isr,
tim6_dac_isr,
tim7_isr,
dma2_stream0_isr,
@@ -305,8 +305,8 @@ void null_handler(void)
#pragma weak sdio_isr = null_handler
#pragma weak tim5_isr = null_handler
#pragma weak spi3_isr = null_handler
#pragma weak usart4_isr = null_handler
#pragma weak usart5_isr = null_handler
#pragma weak uart4_isr = null_handler
#pragma weak uart5_isr = null_handler
#pragma weak tim6_dac_isr = null_handler
#pragma weak tim7_isr = null_handler
#pragma weak dma2_stream0_isr = null_handler