usb/dwc: Cleaned up in the endpoint setup implementation to improve const-ness
This commit is contained in:
committed by
Piotr Esden-Tempski
parent
cfd515e89d
commit
7851b5e4a5
@@ -33,27 +33,24 @@
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void dwc_set_address(usbd_device *usbd_dev, uint8_t addr)
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void dwc_set_address(usbd_device *usbd_dev, uint8_t addr)
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{
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{
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REBASE(OTG_DCFG) = (REBASE(OTG_DCFG) & ~OTG_DCFG_DAD) | (addr << 4);
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REBASE(OTG_DCFG) = (REBASE(OTG_DCFG) & ~OTG_DCFG_DAD) | (addr << 4U);
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}
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}
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void dwc_ep_setup(usbd_device *usbd_dev, uint8_t addr, uint8_t type,
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void dwc_ep_setup(usbd_device *const usbd_dev, const uint8_t addr, const uint8_t type, const uint16_t max_size,
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uint16_t max_size,
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void (*callback)(usbd_device *usbd_dev, uint8_t ep))
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void (*callback) (usbd_device *usbd_dev, uint8_t ep))
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{
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{
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/*
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/*
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* Configure endpoint address and type. Allocate FIFO memory for
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* Configure endpoint address and type. Allocate FIFO memory for
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* endpoint. Install callback function.
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* endpoint. Install callback function.
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*/
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*/
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uint8_t dir = addr & 0x80;
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const uint8_t ep = addr & 0x7fU;
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addr &= 0x7f;
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if (addr == 0) { /* For the default control endpoint */
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if (ep == 0) { /* For the default control endpoint */
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/* Configure IN part. */
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/* Configure IN part. */
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#if defined(STM32H7)
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#if defined(STM32H7)
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/* Do not initially arm the IN endpoint - we've got nothing to send the host at first */
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/* Do not initially arm the IN endpoint - we've got nothing to send the host at first */
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REBASE(OTG_DIEPTSIZ(0)) = 0;
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REBASE(OTG_DIEPTSIZ(0)) = 0;
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REBASE(OTG_DIEPCTL(0)) = (max_size & OTG_DIEPCTL0_MPSIZ_MASK) | OTG_DIEPCTL0_SNAK |
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REBASE(OTG_DIEPCTL(0)) = (max_size & OTG_DIEPCTL0_MPSIZ_MASK) | OTG_DIEPCTL0_SNAK | OTG_DIEPCTL0_USBAEP;
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OTG_DIEPCTL0_USBAEP;
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#else
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#else
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if (max_size >= 64) {
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if (max_size >= 64) {
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REBASE(OTG_DIEPCTL0) = OTG_DIEPCTL0_MPSIZ_64;
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REBASE(OTG_DIEPCTL0) = OTG_DIEPCTL0_MPSIZ_64;
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@@ -65,14 +62,12 @@ void dwc_ep_setup(usbd_device *usbd_dev, uint8_t addr, uint8_t type,
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REBASE(OTG_DIEPCTL0) = OTG_DIEPCTL0_MPSIZ_8;
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REBASE(OTG_DIEPCTL0) = OTG_DIEPCTL0_MPSIZ_8;
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}
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}
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REBASE(OTG_DIEPTSIZ0) =
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REBASE(OTG_DIEPTSIZ0) = (max_size & OTG_DIEPSIZ0_XFRSIZ_MASK);
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(max_size & OTG_DIEPSIZ0_XFRSIZ_MASK);
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REBASE(OTG_DIEPCTL0) |= OTG_DIEPCTL0_EPENA | OTG_DIEPCTL0_SNAK;
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REBASE(OTG_DIEPCTL0) |= OTG_DIEPCTL0_EPENA | OTG_DIEPCTL0_SNAK;
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#endif
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#endif
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/* Configure OUT part. */
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/* Configure OUT part. */
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usbd_dev->doeptsiz[0] = OTG_DIEPSIZ0_STUPCNT_1 | OTG_DIEPSIZ0_PKTCNT |
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usbd_dev->doeptsiz[0] = OTG_DIEPSIZ0_STUPCNT_1 | OTG_DIEPSIZ0_PKTCNT | (max_size & OTG_DIEPSIZ0_XFRSIZ_MASK);
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(max_size & OTG_DIEPSIZ0_XFRSIZ_MASK);
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REBASE(OTG_DOEPTSIZ(0)) = usbd_dev->doeptsiz[0];
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REBASE(OTG_DOEPTSIZ(0)) = usbd_dev->doeptsiz[0];
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#if defined(STM32H7)
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#if defined(STM32H7)
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/* However, *do* arm the OUT endpoint so we can receive the first SETUP packet */
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/* However, *do* arm the OUT endpoint so we can receive the first SETUP packet */
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@@ -97,31 +92,25 @@ void dwc_ep_setup(usbd_device *usbd_dev, uint8_t addr, uint8_t type,
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return;
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return;
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}
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}
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if (dir) {
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if (addr & 0x80U) {
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REBASE(OTG_DIEPTXF(addr)) = ((max_size / 4) << 16) |
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REBASE(OTG_DIEPTXF(ep)) = ((max_size / 4) << 16) | usbd_dev->fifo_mem_top;
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usbd_dev->fifo_mem_top;
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usbd_dev->fifo_mem_top += max_size / 4;
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usbd_dev->fifo_mem_top += max_size / 4;
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REBASE(OTG_DIEPTSIZ(addr)) =
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REBASE(OTG_DIEPTSIZ(ep)) = (max_size & OTG_DIEPSIZ0_XFRSIZ_MASK);
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(max_size & OTG_DIEPSIZ0_XFRSIZ_MASK);
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REBASE(OTG_DIEPCTL(ep)) |= OTG_DIEPCTL0_EPENA | OTG_DIEPCTL0_SNAK | (type << 18) | OTG_DIEPCTL0_USBAEP |
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REBASE(OTG_DIEPCTL(addr)) |=
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OTG_DIEPCTLX_SD0PID | (ep << 22) | max_size;
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OTG_DIEPCTL0_EPENA | OTG_DIEPCTL0_SNAK | (type << 18) |
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OTG_DIEPCTL0_USBAEP | OTG_DIEPCTLX_SD0PID |
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(addr << 22) | max_size;
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if (callback) {
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if (callback) {
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usbd_dev->user_callback_ctr[addr][USB_TRANSACTION_IN] = callback;
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usbd_dev->user_callback_ctr[ep][USB_TRANSACTION_IN] = (void *)callback;
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}
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}
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} else {
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} else {
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usbd_dev->doeptsiz[addr] = OTG_DIEPSIZ0_PKTCNT |
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usbd_dev->doeptsiz[ep] = OTG_DIEPSIZ0_PKTCNT | (max_size & OTG_DIEPSIZ0_XFRSIZ_MASK);
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(max_size & OTG_DIEPSIZ0_XFRSIZ_MASK);
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REBASE(OTG_DOEPTSIZ(ep)) = usbd_dev->doeptsiz[ep];
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REBASE(OTG_DOEPTSIZ(addr)) = usbd_dev->doeptsiz[addr];
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REBASE(OTG_DOEPCTL(ep)) |= OTG_DOEPCTL0_EPENA | OTG_DOEPCTL0_USBAEP | OTG_DIEPCTL0_CNAK | OTG_DOEPCTLX_SD0PID |
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REBASE(OTG_DOEPCTL(addr)) |= OTG_DOEPCTL0_EPENA |
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(type << 18) | max_size;
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OTG_DOEPCTL0_USBAEP | OTG_DIEPCTL0_CNAK |
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OTG_DOEPCTLX_SD0PID | (type << 18) | max_size;
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if (callback) {
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if (callback) {
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usbd_dev->user_callback_ctr[addr][USB_TRANSACTION_OUT] = callback;
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usbd_dev->user_callback_ctr[ep][USB_TRANSACTION_OUT] = (void *)callback;
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}
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}
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}
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}
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}
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}
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@@ -142,8 +131,7 @@ void dwc_endpoints_reset(usbd_device *usbd_dev)
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}
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}
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/* Flush all tx/rx fifos */
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/* Flush all tx/rx fifos */
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REBASE(OTG_GRSTCTL) = OTG_GRSTCTL_TXFFLSH | OTG_GRSTCTL_TXFNUM_ALL |
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REBASE(OTG_GRSTCTL) = OTG_GRSTCTL_TXFFLSH | OTG_GRSTCTL_TXFNUM_ALL | OTG_GRSTCTL_RXFFLSH;
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OTG_GRSTCTL_RXFFLSH;
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}
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}
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void dwc_ep_stall_set(usbd_device *usbd_dev, uint8_t addr, uint8_t stall)
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void dwc_ep_stall_set(usbd_device *usbd_dev, uint8_t addr, uint8_t stall)
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@@ -179,11 +167,9 @@ uint8_t dwc_ep_stall_get(usbd_device *usbd_dev, uint8_t addr)
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{
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{
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/* Return non-zero if STALL set. */
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/* Return non-zero if STALL set. */
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if (addr & 0x80) {
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if (addr & 0x80) {
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return (REBASE(OTG_DIEPCTL(addr & 0x7f)) &
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return (REBASE(OTG_DIEPCTL(addr & 0x7f)) & OTG_DIEPCTL0_STALL) ? 1 : 0;
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OTG_DIEPCTL0_STALL) ? 1 : 0;
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} else {
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} else {
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return (REBASE(OTG_DOEPCTL(addr)) &
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return (REBASE(OTG_DOEPCTL(addr)) & OTG_DOEPCTL0_STALL) ? 1 : 0;
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OTG_DOEPCTL0_STALL) ? 1 : 0;
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}
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}
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}
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}
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@@ -203,8 +189,7 @@ void dwc_ep_nak_set(usbd_device *usbd_dev, uint8_t addr, uint8_t nak)
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}
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}
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}
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}
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uint16_t dwc_ep_write_packet(usbd_device *usbd_dev, uint8_t addr,
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uint16_t dwc_ep_write_packet(usbd_device *usbd_dev, uint8_t addr, const void *buf, uint16_t len)
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const void *buf, uint16_t len)
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{
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{
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addr &= 0x7F;
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addr &= 0x7F;
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@@ -266,8 +251,7 @@ uint16_t dwc_ep_write_packet(usbd_device *usbd_dev, uint8_t addr,
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return len;
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return len;
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}
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}
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uint16_t dwc_ep_read_packet(usbd_device *usbd_dev, uint8_t addr,
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uint16_t dwc_ep_read_packet(usbd_device *usbd_dev, uint8_t addr, void *buf, uint16_t len)
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void *buf, uint16_t len)
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{
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{
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int i;
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int i;
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uint32_t *buf32 = buf;
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uint32_t *buf32 = buf;
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@@ -280,7 +264,7 @@ uint16_t dwc_ep_read_packet(usbd_device *usbd_dev, uint8_t addr,
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/* We do not need to know the endpoint address since there is only one
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/* We do not need to know the endpoint address since there is only one
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* receive FIFO for all endpoints.
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* receive FIFO for all endpoints.
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*/
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*/
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(void) addr;
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(void)addr;
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len = MIN(len, usbd_dev->rxbcnt);
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len = MIN(len, usbd_dev->rxbcnt);
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/* ARMv7M supports non-word-aligned accesses, ARMv6M does not. */
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/* ARMv7M supports non-word-aligned accesses, ARMv6M does not. */
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@@ -377,10 +361,8 @@ void dwc_poll(usbd_device *usbd_dev)
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for (size_t i = 0; i < ENDPOINT_COUNT; i++) {
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for (size_t i = 0; i < ENDPOINT_COUNT; i++) {
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if (REBASE(OTG_DIEPINT(i)) & OTG_DIEPINTX_XFRC) {
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if (REBASE(OTG_DIEPINT(i)) & OTG_DIEPINTX_XFRC) {
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/* Transfer complete. */
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/* Transfer complete. */
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if (usbd_dev->user_callback_ctr[i]
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if (usbd_dev->user_callback_ctr[i][USB_TRANSACTION_IN]) {
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[USB_TRANSACTION_IN]) {
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usbd_dev->user_callback_ctr[i][USB_TRANSACTION_IN](usbd_dev, i);
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usbd_dev->user_callback_ctr[i]
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[USB_TRANSACTION_IN](usbd_dev, i);
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}
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}
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REBASE(OTG_DIEPINT(i)) = OTG_DIEPINTX_XFRC;
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REBASE(OTG_DIEPINT(i)) = OTG_DIEPINTX_XFRC;
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@@ -398,10 +380,10 @@ void dwc_poll(usbd_device *usbd_dev)
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usbd_dev->user_callback_ctr[ep][USB_TRANSACTION_SETUP](usbd_dev, ep);
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usbd_dev->user_callback_ctr[ep][USB_TRANSACTION_SETUP](usbd_dev, ep);
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}
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}
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if (pktsts == OTG_GRXSTSP_PKTSTS_OUT_COMP || pktsts == OTG_GRXSTSP_PKTSTS_SETUP_COMP) {
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if (pktsts == OTG_GRXSTSP_PKTSTS_OUT_COMP || pktsts == OTG_GRXSTSP_PKTSTS_SETUP_COMP) {
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REBASE(OTG_DOEPTSIZ(ep)) = usbd_dev->doeptsiz[ep];
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REBASE(OTG_DOEPTSIZ(ep)) = usbd_dev->doeptsiz[ep];
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REBASE(OTG_DOEPCTL(ep)) |= OTG_DOEPCTL0_EPENA |
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REBASE(OTG_DOEPCTL(ep)) |=
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(usbd_dev->force_nak[ep] ? OTG_DOEPCTL0_SNAK : OTG_DOEPCTL0_CNAK);
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OTG_DOEPCTL0_EPENA | (usbd_dev->force_nak[ep] ? OTG_DOEPCTL0_SNAK : OTG_DOEPCTL0_CNAK);
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return;
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return;
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}
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}
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