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usb/dwc: Cleaned up in the endpoint setup implementation to improve const-ness

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This commit is contained in:
dragonmux
2024-04-18 16:14:04 +01:00
committed by Piotr Esden-Tempski
parent cfd515e89d
commit 7851b5e4a5
1 changed files with 31 additions and 49 deletions
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80
lib/usb/usb_dwc_common.c
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@@ -33,27 +33,24 @@
void dwc_set_address(usbd_device *usbd_dev, uint8_t addr)
{
REBASE(OTG_DCFG) = (REBASE(OTG_DCFG) & ~OTG_DCFG_DAD) | (addr << 4);
REBASE(OTG_DCFG) = (REBASE(OTG_DCFG) & ~OTG_DCFG_DAD) | (addr << 4U);
}
void dwc_ep_setup(usbd_device *usbd_dev, uint8_t addr, uint8_t type,
uint16_t max_size,
void (*callback) (usbd_device *usbd_dev, uint8_t ep))
void dwc_ep_setup(usbd_device *const usbd_dev, const uint8_t addr, const uint8_t type, const uint16_t max_size,
void (*callback)(usbd_device *usbd_dev, uint8_t ep))
{
/*
* Configure endpoint address and type. Allocate FIFO memory for
* endpoint. Install callback function.
*/
uint8_t dir = addr & 0x80;
addr &= 0x7f;
const uint8_t ep = addr & 0x7fU;
if (addr == 0) { /* For the default control endpoint */
/* Configure IN part. */
if (ep == 0) { /* For the default control endpoint */
/* Configure IN part. */
#if defined(STM32H7)
/* Do not initially arm the IN endpoint - we've got nothing to send the host at first */
REBASE(OTG_DIEPTSIZ(0)) = 0;
REBASE(OTG_DIEPCTL(0)) = (max_size & OTG_DIEPCTL0_MPSIZ_MASK) | OTG_DIEPCTL0_SNAK |
OTG_DIEPCTL0_USBAEP;
REBASE(OTG_DIEPCTL(0)) = (max_size & OTG_DIEPCTL0_MPSIZ_MASK) | OTG_DIEPCTL0_SNAK | OTG_DIEPCTL0_USBAEP;
#else
if (max_size >= 64) {
REBASE(OTG_DIEPCTL0) = OTG_DIEPCTL0_MPSIZ_64;
@@ -65,14 +62,12 @@ void dwc_ep_setup(usbd_device *usbd_dev, uint8_t addr, uint8_t type,
REBASE(OTG_DIEPCTL0) = OTG_DIEPCTL0_MPSIZ_8;
}
REBASE(OTG_DIEPTSIZ0) =
(max_size & OTG_DIEPSIZ0_XFRSIZ_MASK);
REBASE(OTG_DIEPTSIZ0) = (max_size & OTG_DIEPSIZ0_XFRSIZ_MASK);
REBASE(OTG_DIEPCTL0) |= OTG_DIEPCTL0_EPENA | OTG_DIEPCTL0_SNAK;
#endif
/* Configure OUT part. */
usbd_dev->doeptsiz[0] = OTG_DIEPSIZ0_STUPCNT_1 | OTG_DIEPSIZ0_PKTCNT |
(max_size & OTG_DIEPSIZ0_XFRSIZ_MASK);
usbd_dev->doeptsiz[0] = OTG_DIEPSIZ0_STUPCNT_1 | OTG_DIEPSIZ0_PKTCNT | (max_size & OTG_DIEPSIZ0_XFRSIZ_MASK);
REBASE(OTG_DOEPTSIZ(0)) = usbd_dev->doeptsiz[0];
#if defined(STM32H7)
/* However, *do* arm the OUT endpoint so we can receive the first SETUP packet */
@@ -97,31 +92,25 @@ void dwc_ep_setup(usbd_device *usbd_dev, uint8_t addr, uint8_t type,
return;
}
if (dir) {
REBASE(OTG_DIEPTXF(addr)) = ((max_size / 4) << 16) |
usbd_dev->fifo_mem_top;
if (addr & 0x80U) {
REBASE(OTG_DIEPTXF(ep)) = ((max_size / 4) << 16) | usbd_dev->fifo_mem_top;
usbd_dev->fifo_mem_top += max_size / 4;
REBASE(OTG_DIEPTSIZ(addr)) =
(max_size & OTG_DIEPSIZ0_XFRSIZ_MASK);
REBASE(OTG_DIEPCTL(addr)) |=
OTG_DIEPCTL0_EPENA | OTG_DIEPCTL0_SNAK | (type << 18) |
OTG_DIEPCTL0_USBAEP | OTG_DIEPCTLX_SD0PID |
(addr << 22) | max_size;
REBASE(OTG_DIEPTSIZ(ep)) = (max_size & OTG_DIEPSIZ0_XFRSIZ_MASK);
REBASE(OTG_DIEPCTL(ep)) |= OTG_DIEPCTL0_EPENA | OTG_DIEPCTL0_SNAK | (type << 18) | OTG_DIEPCTL0_USBAEP |
OTG_DIEPCTLX_SD0PID | (ep << 22) | max_size;
if (callback) {
usbd_dev->user_callback_ctr[addr][USB_TRANSACTION_IN] = callback;
usbd_dev->user_callback_ctr[ep][USB_TRANSACTION_IN] = (void *)callback;
}
} else {
usbd_dev->doeptsiz[addr] = OTG_DIEPSIZ0_PKTCNT |
(max_size & OTG_DIEPSIZ0_XFRSIZ_MASK);
REBASE(OTG_DOEPTSIZ(addr)) = usbd_dev->doeptsiz[addr];
REBASE(OTG_DOEPCTL(addr)) |= OTG_DOEPCTL0_EPENA |
OTG_DOEPCTL0_USBAEP | OTG_DIEPCTL0_CNAK |
OTG_DOEPCTLX_SD0PID | (type << 18) | max_size;
usbd_dev->doeptsiz[ep] = OTG_DIEPSIZ0_PKTCNT | (max_size & OTG_DIEPSIZ0_XFRSIZ_MASK);
REBASE(OTG_DOEPTSIZ(ep)) = usbd_dev->doeptsiz[ep];
REBASE(OTG_DOEPCTL(ep)) |= OTG_DOEPCTL0_EPENA | OTG_DOEPCTL0_USBAEP | OTG_DIEPCTL0_CNAK | OTG_DOEPCTLX_SD0PID |
(type << 18) | max_size;
if (callback) {
usbd_dev->user_callback_ctr[addr][USB_TRANSACTION_OUT] = callback;
usbd_dev->user_callback_ctr[ep][USB_TRANSACTION_OUT] = (void *)callback;
}
}
}
@@ -142,8 +131,7 @@ void dwc_endpoints_reset(usbd_device *usbd_dev)
}
/* Flush all tx/rx fifos */
REBASE(OTG_GRSTCTL) = OTG_GRSTCTL_TXFFLSH | OTG_GRSTCTL_TXFNUM_ALL |
OTG_GRSTCTL_RXFFLSH;
REBASE(OTG_GRSTCTL) = OTG_GRSTCTL_TXFFLSH | OTG_GRSTCTL_TXFNUM_ALL | OTG_GRSTCTL_RXFFLSH;
}
void dwc_ep_stall_set(usbd_device *usbd_dev, uint8_t addr, uint8_t stall)
@@ -179,11 +167,9 @@ uint8_t dwc_ep_stall_get(usbd_device *usbd_dev, uint8_t addr)
{
/* Return non-zero if STALL set. */
if (addr & 0x80) {
return (REBASE(OTG_DIEPCTL(addr & 0x7f)) &
OTG_DIEPCTL0_STALL) ? 1 : 0;
return (REBASE(OTG_DIEPCTL(addr & 0x7f)) & OTG_DIEPCTL0_STALL) ? 1 : 0;
} else {
return (REBASE(OTG_DOEPCTL(addr)) &
OTG_DOEPCTL0_STALL) ? 1 : 0;
return (REBASE(OTG_DOEPCTL(addr)) & OTG_DOEPCTL0_STALL) ? 1 : 0;
}
}
@@ -203,8 +189,7 @@ void dwc_ep_nak_set(usbd_device *usbd_dev, uint8_t addr, uint8_t nak)
}
}
uint16_t dwc_ep_write_packet(usbd_device *usbd_dev, uint8_t addr,
const void *buf, uint16_t len)
uint16_t dwc_ep_write_packet(usbd_device *usbd_dev, uint8_t addr, const void *buf, uint16_t len)
{
addr &= 0x7F;
@@ -266,8 +251,7 @@ uint16_t dwc_ep_write_packet(usbd_device *usbd_dev, uint8_t addr,
return len;
}
uint16_t dwc_ep_read_packet(usbd_device *usbd_dev, uint8_t addr,
void *buf, uint16_t len)
uint16_t dwc_ep_read_packet(usbd_device *usbd_dev, uint8_t addr, void *buf, uint16_t len)
{
int i;
uint32_t *buf32 = buf;
@@ -280,7 +264,7 @@ uint16_t dwc_ep_read_packet(usbd_device *usbd_dev, uint8_t addr,
/* We do not need to know the endpoint address since there is only one
* receive FIFO for all endpoints.
*/
(void) addr;
(void)addr;
len = MIN(len, usbd_dev->rxbcnt);
/* ARMv7M supports non-word-aligned accesses, ARMv6M does not. */
@@ -377,10 +361,8 @@ void dwc_poll(usbd_device *usbd_dev)
for (size_t i = 0; i < ENDPOINT_COUNT; i++) {
if (REBASE(OTG_DIEPINT(i)) & OTG_DIEPINTX_XFRC) {
/* Transfer complete. */
if (usbd_dev->user_callback_ctr[i]
[USB_TRANSACTION_IN]) {
usbd_dev->user_callback_ctr[i]
[USB_TRANSACTION_IN](usbd_dev, i);
if (usbd_dev->user_callback_ctr[i][USB_TRANSACTION_IN]) {
usbd_dev->user_callback_ctr[i][USB_TRANSACTION_IN](usbd_dev, i);
}
REBASE(OTG_DIEPINT(i)) = OTG_DIEPINTX_XFRC;
@@ -398,10 +380,10 @@ void dwc_poll(usbd_device *usbd_dev)
usbd_dev->user_callback_ctr[ep][USB_TRANSACTION_SETUP](usbd_dev, ep);
}
if (pktsts == OTG_GRXSTSP_PKTSTS_OUT_COMP || pktsts == OTG_GRXSTSP_PKTSTS_SETUP_COMP) {
if (pktsts == OTG_GRXSTSP_PKTSTS_OUT_COMP || pktsts == OTG_GRXSTSP_PKTSTS_SETUP_COMP) {
REBASE(OTG_DOEPTSIZ(ep)) = usbd_dev->doeptsiz[ep];
REBASE(OTG_DOEPCTL(ep)) |= OTG_DOEPCTL0_EPENA |
(usbd_dev->force_nak[ep] ? OTG_DOEPCTL0_SNAK : OTG_DOEPCTL0_CNAK);
REBASE(OTG_DOEPCTL(ep)) |=
OTG_DOEPCTL0_EPENA | (usbd_dev->force_nak[ep] ? OTG_DOEPCTL0_SNAK : OTG_DOEPCTL0_CNAK);
return;
}