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stm32f4: rcc_clock_setup_pll() correctly enable PWR

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Original code used the special macros for rcc_periph_clock_enable
instead of the appropraite APB1ENR bit definition.

Switch to the correct, simpler form, using the correct parameter.
This commit is contained in:
TomasPech
2019-12-12 00:32:00 +01:00
committed by Karl Palsson
parent 3c34f0033c
commit 4a9ba30138
1 changed files with 1 additions and 1 deletions
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2
lib/stm32/f4/rcc.c
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@@ -722,7 +722,7 @@ void rcc_clock_setup_pll(const struct rcc_clock_scale *clock)
} }
/* Set the VOS scale mode */ /* Set the VOS scale mode */
rcc_peripheral_enable_clock(&RCC_APB1ENR, RCC_PWR); rcc_periph_clock_enable(RCC_PWR);
pwr_set_vos_scale(clock->voltage_scale); pwr_set_vos_scale(clock->voltage_scale);
/* /*