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stm32/timer: Moved the OC3 mode logic into its own function

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This commit is contained in:
dragonmux
2023-09-26 21:42:54 +01:00
committed by Piotr Esden-Tempski
parent a058f77434
commit 1254cb8cc8
1 changed files with 35 additions and 30 deletions
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65
lib/stm32/common/timer_common_all.c
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@@ -898,6 +898,40 @@ void timer_set_oc2_mode(uint32_t timer_peripheral, enum tim_oc_mode oc_mode)
} }
} }
void timer_set_oc3_mode(uint32_t timer_peripheral, enum tim_oc_mode oc_mode)
{
TIM_CCMR2(timer_peripheral) &= ~TIM_CCMR2_CC3S_MASK;
TIM_CCMR2(timer_peripheral) |= TIM_CCMR2_CC3S_OUT;
TIM_CCMR2(timer_peripheral) &= ~TIM_CCMR2_OC3M_MASK;
switch (oc_mode) {
case TIM_OCM_FROZEN:
TIM_CCMR2(timer_peripheral) |= TIM_CCMR2_OC3M_FROZEN;
break;
case TIM_OCM_ACTIVE:
TIM_CCMR2(timer_peripheral) |= TIM_CCMR2_OC3M_ACTIVE;
break;
case TIM_OCM_INACTIVE:
TIM_CCMR2(timer_peripheral) |= TIM_CCMR2_OC3M_INACTIVE;
break;
case TIM_OCM_TOGGLE:
TIM_CCMR2(timer_peripheral) |= TIM_CCMR2_OC3M_TOGGLE;
break;
case TIM_OCM_FORCE_LOW:
TIM_CCMR2(timer_peripheral) |= TIM_CCMR2_OC3M_FORCE_LOW;
break;
case TIM_OCM_FORCE_HIGH:
TIM_CCMR2(timer_peripheral) |=
TIM_CCMR2_OC3M_FORCE_HIGH;
break;
case TIM_OCM_PWM1:
TIM_CCMR2(timer_peripheral) |= TIM_CCMR2_OC3M_PWM1;
break;
case TIM_OCM_PWM2:
TIM_CCMR2(timer_peripheral) |= TIM_CCMR2_OC3M_PWM2;
break;
}
}
/*---------------------------------------------------------------------------*/ /*---------------------------------------------------------------------------*/
/** @brief Timer Set Output Compare Mode /** @brief Timer Set Output Compare Mode
@@ -936,36 +970,7 @@ void timer_set_oc_mode(uint32_t timer_peripheral, enum tim_oc_id oc_id,
timer_set_oc2_mode(timer_peripheral, oc_mode); timer_set_oc2_mode(timer_peripheral, oc_mode);
break; break;
case TIM_OC3: case TIM_OC3:
TIM_CCMR2(timer_peripheral) &= ~TIM_CCMR2_CC3S_MASK; timer_set_oc3_mode(timer_peripheral, oc_mode);
TIM_CCMR2(timer_peripheral) |= TIM_CCMR2_CC3S_OUT;
TIM_CCMR2(timer_peripheral) &= ~TIM_CCMR2_OC3M_MASK;
switch (oc_mode) {
case TIM_OCM_FROZEN:
TIM_CCMR2(timer_peripheral) |= TIM_CCMR2_OC3M_FROZEN;
break;
case TIM_OCM_ACTIVE:
TIM_CCMR2(timer_peripheral) |= TIM_CCMR2_OC3M_ACTIVE;
break;
case TIM_OCM_INACTIVE:
TIM_CCMR2(timer_peripheral) |= TIM_CCMR2_OC3M_INACTIVE;
break;
case TIM_OCM_TOGGLE:
TIM_CCMR2(timer_peripheral) |= TIM_CCMR2_OC3M_TOGGLE;
break;
case TIM_OCM_FORCE_LOW:
TIM_CCMR2(timer_peripheral) |= TIM_CCMR2_OC3M_FORCE_LOW;
break;
case TIM_OCM_FORCE_HIGH:
TIM_CCMR2(timer_peripheral) |=
TIM_CCMR2_OC3M_FORCE_HIGH;
break;
case TIM_OCM_PWM1:
TIM_CCMR2(timer_peripheral) |= TIM_CCMR2_OC3M_PWM1;
break;
case TIM_OCM_PWM2:
TIM_CCMR2(timer_peripheral) |= TIM_CCMR2_OC3M_PWM2;
break;
}
break; break;
case TIM_OC4: case TIM_OC4:
TIM_CCMR2(timer_peripheral) &= ~TIM_CCMR2_CC4S_MASK; TIM_CCMR2(timer_peripheral) &= ~TIM_CCMR2_CC4S_MASK;