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stm32g4: rcc: use SYSCLK consistently with other families

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Signed-off-by: Karl Palsson <karlp@tweak.au>
This commit is contained in:
Karl Palsson
2023-02-02 23:53:42 +00:00
parent f0575c3560
commit 0878a04696
1 changed files with 6 additions and 6 deletions
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12
include/libopencm3/stm32/g4/rcc.h
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@@ -574,12 +574,12 @@
#define RCC_CCIPR_ADC345SEL_NONE 0
#define RCC_CCIPR_ADC345SEL_PLLP 1
#define RCC_CCIPR_ADC345SEL_SYS 2
#define RCC_CCIPR_ADC345SEL_SYSCLK 2
#define RCC_CCIPR_ADC345SEL_SHIFT 30
#define RCC_CCIPR_ADC12SEL_NONE 0
#define RCC_CCIPR_ADC12SEL_PLLP 1
#define RCC_CCIPR_ADC12SEL_SYS 2
#define RCC_CCIPR_ADC12SEL_SYSCLK 2
#define RCC_CCIPR_ADC12SEL_SHIFT 28
#define RCC_CCIPR_CLK48SEL_HSI48 0
@@ -591,13 +591,13 @@
#define RCC_CCIPR_FDCANSEL_PCLK 2
#define RCC_CCIPR_FDCANSEL_SHIFT 24
#define RCC_CCIPR_I2S23SEL_SYS 0
#define RCC_CCIPR_I2S23SEL_SYSCLK 0
#define RCC_CCIPR_I2S23SEL_PLLQ 1
#define RCC_CCIPR_I2S23SEL_EXT 2
#define RCC_CCIPR_I2S23SEL_SHI16 3
#define RCC_CCIPR_I2S23SEL_SHIFT 22
#define RCC_CCIPR_SAI1SEL_SYS 0
#define RCC_CCIPR_SAI1SEL_SYSCLK 0
#define RCC_CCIPR_SAI1SEL_PLLQ 1
#define RCC_CCIPR_SAI1SEL_EXT 2
#define RCC_CCIPR_SAI1SEL_HSI16 3
@@ -610,14 +610,14 @@
#define RCC_CCIPR_LPTIM1SEL_SHIFT 18
#define RCC_CCIPR_I2CxSEL_PCLK 0
#define RCC_CCIPR_I2CxSEL_SYS 1
#define RCC_CCIPR_I2CxSEL_SYSCLK 1
#define RCC_CCIPR_I2CxSEL_HSI16 2
#define RCC_CCIPR_I2C3SEL_SHIFT 16
#define RCC_CCIPR_I2C2SEL_SHIFT 14
#define RCC_CCIPR_I2C1SEL_SHIFT 12
#define RCC_CCIPR_USARTxSEL_PCLK 0
#define RCC_CCIPR_USARTxSEL_SYSCLK 1
#define RCC_CCIPR_USARTxSEL_SYSCLK 1
#define RCC_CCIPR_USARTxSEL_HSI16 2
#define RCC_CCIPR_USARTxSEL_LSE 3