EMTime/libopencm3-examples
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[rcc_periph_clock_enable] Using the new rcc enable format.

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We are missing handling of stm32l1 AHBLP clock rail.
This commit is contained in:
Piotr Esden-Tempski
2015-01-20 15:33:00 -08:00
parent 1c4ae95729
commit 2583cc54cc
4 changed files with 16 additions and 15 deletions
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15
examples/stm32/f1/stm32vl-discovery/spi/spi.c
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@@ -33,18 +33,17 @@ static void clock_setup(void)
rcc_clock_setup_in_hse_8mhz_out_24mhz();
/* Enable GPIOA, GPIOB, GPIOC clock. */
rcc_peripheral_enable_clock(&RCC_APB2ENR,
RCC_APB2ENR_IOPAEN | RCC_APB2ENR_IOPBEN |
RCC_APB2ENR_IOPCEN);
rcc_periph_clock_enable(RCC_GPIOA);
rcc_periph_clock_enable(RCC_GPIOB);
rcc_periph_clock_enable(RCC_GPIOC);
/* Enable clocks for GPIO port A (for GPIO_USART2_TX) and USART2. */
rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_IOPAEN |
RCC_APB2ENR_AFIOEN);
rcc_peripheral_enable_clock(&RCC_APB1ENR, RCC_APB1ENR_USART2EN);
rcc_periph_clock_enable(RCC_GPIOA);
rcc_periph_clock_enable(RCC_AFIO);
rcc_periph_clock_enable(RCC_USART2);
/* Enable SPI1 Periph and gpio clocks */
rcc_peripheral_enable_clock(&RCC_APB2ENR,
RCC_APB2ENR_SPI1EN);
rcc_periph_clock_enable(RCC_SPI1);
}

4
examples/stm32/f4/stm32f4-discovery/usb_msc/msc.c
View File

@@ -106,8 +106,8 @@ int main(void)
{
rcc_clock_setup_hse_3v3(&hse_8mhz_3v3[CLOCK_3V3_120MHZ]);
rcc_peripheral_enable_clock(&RCC_AHB1ENR, RCC_AHB1ENR_IOPAEN);
rcc_peripheral_enable_clock(&RCC_AHB2ENR, RCC_AHB2ENR_OTGFSEN);
rcc_periph_clock_enable(RCC_GPIOA);
rcc_periph_clock_enable(RCC_OTGFS);
gpio_mode_setup(GPIOA, GPIO_MODE_AF, GPIO_PUPD_NONE,
GPIO9 | GPIO11 | GPIO12);

4
examples/stm32/f4/stm32f429i-discovery/usb_msc/msc.c
View File

@@ -107,8 +107,8 @@ int main(void)
{
rcc_clock_setup_hse_3v3(&hse_8mhz_3v3[CLOCK_3V3_120MHZ]);
rcc_peripheral_enable_clock(&RCC_AHB1ENR, RCC_AHB1ENR_IOPBEN);
rcc_peripheral_enable_clock(&RCC_AHB1ENR, RCC_AHB1ENR_OTGHSEN);
rcc_periph_clock_enable(RCC_GPIOB);
rcc_periph_clock_enable(RCC_OTGHS);
gpio_mode_setup(GPIOB, GPIO_MODE_AF, GPIO_PUPD_NONE,
GPIO13 | GPIO14 | GPIO15);

8
examples/stm32/l1/stm32l-discovery/lcd-display/lcd-hello.c
View File

@@ -24,8 +24,9 @@
static void lcd_init(void)
{
/* Move all needed GPIO pins to LCD alternative mode */
rcc_peripheral_enable_clock (&RCC_AHBENR, RCC_AHBENR_GPIOAEN
| RCC_AHBENR_GPIOBEN | RCC_AHBENR_GPIOCEN);
rcc_periph_clock_enable(RCC_GPIOA);
rcc_periph_clock_enable(RCC_GPIOB);
rcc_periph_clock_enable(RCC_GPIOC);
rcc_peripheral_enable_clock (&RCC_AHBLPENR, RCC_AHBLPENR_GPIOALPEN
| RCC_AHBLPENR_GPIOBLPEN | RCC_AHBLPENR_GPIOCLPEN);
gpio_mode_setup(GPIOA, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO1 | GPIO2
@@ -45,7 +46,8 @@ static void lcd_init(void)
| GPIO7 | GPIO8 | GPIO9 | GPIO10 | GPIO11);
/* Enable LCD and use LSE clock as RTC/LCD clock. */
rcc_peripheral_enable_clock (&RCC_APB1ENR, RCC_APB1ENR_PWREN | RCC_APB1ENR_LCDEN);
rcc_periph_clock_enable(RCC_PWR);
rcc_periph_clock_enable(RCC_LCD);
pwr_disable_backup_domain_write_protect ();
rcc_osc_on (LSE);
rcc_wait_for_osc_ready (LSE);