Marcus Hultmark Varejao 6e87892a7e stm32f4: rcc: fix setup of main system clock with pllp ...

Fixes: 57c2b00a69

There was an issue with the pllp value calculation where the masking was done
in the wrong place. The pllp value was always equivalent to 2 (the bits were
always set to 0b00) which could result in an undesired system clock frequency.

2016-09-02 10:33:27 +02:00

..

common

doc: stm32: fix doxygen syntax

2016-08-18 23:51:49 +00:00

f0

stm32: rcc: provide async routines for osc checks

2016-08-18 23:41:04 +00:00

f1

stm32: rcc: provide async routines for osc checks

2016-08-18 23:41:04 +00:00

f2

stm32: rcc: provide async routines for osc checks

2016-08-18 23:41:04 +00:00

f3

stm32f3: adc: drop unimplemented dead code.

2016-08-18 23:55:11 +00:00

f4

stm32f4: rcc: fix setup of main system clock with pllp

2016-09-02 10:33:27 +02:00

f7

stm32f7: fix build failure when CFLAGS is set

2016-04-08 05:38:12 +02:00

l0

stm32: rcc: provide async routines for osc checks

2016-08-18 23:41:04 +00:00

l1

stm32l1: rcc: reliably clock up/down

2016-08-19 11:34:46 +00:00

l4

stm32l4: add common timer code.

2016-03-30 16:59:57 +00:00

can.c

Stile fixes run, 80 char boundry.

2013-06-12 21:07:35 -07:00

desig.c

stm32/desig: fix/cleanup desig_get_unique_id and to string functionality

2016-04-11 22:57:55 +00:00

st_usbfs_v1.c

usb: extract ST USB FS peripheral core. [BREAKING CHANGE]

2015-10-03 01:32:34 +00:00

st_usbfs_v2.c

usb: Add st_usbfs_v2 for f0/l0 devices

2015-10-03 02:03:58 +00:00