The function `rcc_set_lpuart1_sel()` was incorrectly using `RCC_CCIPR_LPTIM1SEL_SHIFT`
instead of `RCC_CCIPR_LPUART1SEL_SHIFT`, causing incorrect LPUART1 clock source selection.
This patch corrects the bit shift to ensure the LPUART1SEL field is properly updated.
To verify check RM0377 Reference manual section 7.3.19.
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