diff --git a/examples/stm32f1/Makefile.include b/examples/stm32f1/Makefile.include index 82e6d2a4..2edd2552 100644 --- a/examples/stm32f1/Makefile.include +++ b/examples/stm32f1/Makefile.include @@ -75,10 +75,6 @@ flash: $(BINARY).flash @#printf " OBJDUMP $(*).list\n" $(Q)$(OBJDUMP) -S $(*).elf > $(*).list -foo.elf: $(OBJS) $(LDSCRIPT) $(TOOLCHAIN_DIR)/lib/stm32f1/libopencm3_stm32f1.a - @#printf " LD $(subst $(shell pwd)/,,$(@))\n" - $(Q)$(LD) -o foo.elf $(OBJS) -lopencm3_stm32f1 $(LDFLAGS) - %.elf: $(OBJS) $(LDSCRIPT) $(TOOLCHAIN_DIR)/lib/stm32f1/libopencm3_stm32f1.a @#printf " LD $(subst $(shell pwd)/,,$(@))\n" $(Q)$(LD) -o $(*).elf $(OBJS) -lopencm3_stm32f1 $(LDFLAGS) diff --git a/examples/stm32f2/Makefile.include b/examples/stm32f2/Makefile.include index 9cec6e7d..3539cddc 100644 --- a/examples/stm32f2/Makefile.include +++ b/examples/stm32f2/Makefile.include @@ -77,10 +77,6 @@ flash: $(BINARY).flash @#printf " OBJDUMP $(*).list\n" $(Q)$(OBJDUMP) -S $(*).elf > $(*).list -foo.elf: $(OBJS) $(LDSCRIPT) $(TOOLCHAIN_DIR)/lib/stm32f2/libopencm3_stm32f2.a - @#printf " LD $(subst $(shell pwd)/,,$(@))\n" - $(Q)$(LD) -o foo.elf $(OBJS) -lopencm3_stm32f2 $(LDFLAGS) - %.elf: $(OBJS) $(LDSCRIPT) $(TOOLCHAIN_DIR)/lib/stm32f2/libopencm3_stm32f2.a @#printf " LD $(subst $(shell pwd)/,,$(@))\n" $(Q)$(LD) -o $(*).elf $(OBJS) -lopencm3_stm32f2 $(LDFLAGS) diff --git a/include/libopencm3/stm32/f2/nvic_f2.h b/include/libopencm3/stm32/f2/nvic_f2.h index 2545f0a1..99c64e38 100644 --- a/include/libopencm3/stm32/f2/nvic_f2.h +++ b/include/libopencm3/stm32/f2/nvic_f2.h @@ -27,86 +27,86 @@ */ /* User Interrupts */ -#define NVIC_WWDG_IRQ 0 -#define PVD_IRQ 1 -#define TAMP_STAMP_IRQ 2 -#define RTC_WKUP_IRQ 3 -#define FLASH_IRQ 4 -#define RCC_IRQ 5 -#define EXTI0_IRQ 6 -#define EXTI1_IRQ 7 -#define EXTI2_IRQ 8 -#define EXTI3_IRQ 9 -#define EXTI4_IRQ 10 -#define DMA1_STREAM0_IRQ 11 -#define DMA1_STREAM1_IRQ 12 -#define DMA1_STREAM2_IRQ 13 -#define DMA1_STREAM3_IRQ 14 -#define DMA1_STREAM4_IRQ 15 -#define DMA1_STREAM5_IRQ 16 -#define DMA1_STREAM6_IRQ 17 -#define ADC_IRQ 18 -#define CAN1_TX_IRQ 19 -#define CAN1_RX0_IRQ 20 -#define CAN1_RX1_IRQ 21 -#define CAN1_SCE_IRQ 22 -#define EXTI9_5_IRQ 23 -#define TIM1_BRK_TIM9_IRQ 24 -#define TIM1_UP_TIM10_IRQ 25 -#define TIM1_TRG_COM_TIM11_IRQ 26 -#define TIM1_CC_IRQ 27 -#define TIM2_IRQ 28 -#define TIM3_IRQ 29 -#define TIM4_IRQ 30 -#define I2C1_EV_IRQ 31 -#define I2C1_ER_IRQ 32 -#define I2C2_EV_IRQ 33 -#define I2C2_ER_IRQ 34 -#define SPI1_IRQ 35 -#define SPI2_IRQ 36 -#define USART1_IRQ 37 -#define USART2_IRQ 38 -#define USART3_IRQ 39 -#define EXTI15_10_IRQ 40 -#define RTC_ALARM_IRQ 41 -#define USB_FS_WKUP_IRQ 42 -#define TIM8_BRK_TIM12_IRQ 43 -#define TIM8_UP_TIM13_IRQ 44 -#define TIM8_TRG_COM_TIM14_IRQ 45 -#define TIM8_CC_IRQ 46 -#define DMA1_STREAM7_IRQ 47 -#define FSMC_IRQ 48 -#define SDIO_IRQ 49 -#define TIM5_IRQ 50 -#define SPI3_IRQ 51 -#define USART4_IRQ 52 -#define USART5_IRQ 53 -#define TIM6_DAC_IRQ 54 -#define TIM7_IRQ 55 -#define DMA2_STREAM0_IRQ 56 -#define DMA2_STREAM1_IRQ 57 -#define DMA2_STREAM2_IRQ 58 -#define DMA2_STREAM3_IRQ 59 -#define DMA2_STREAM4_IRQ 60 -#define ETH_IRQ 61 -#define ETH_WKUP_IRQ 62 -#define CAN2_TX_IRQ 63 -#define CAN2_RX0_IRQ 64 -#define CAN2_RX1_IRQ 65 -#define CAN2_SCE_IRQ 66 -#define OTG_FS_IRQ 67 -#define DMA2_STREAM5_IRQ 68 -#define DMA2_STREAM6_IRQ 69 -#define DMA2_STREAM7_IRQ 70 -#define USART6_IRQ 71 -#define I2C3_EV_IRQ 72 -#define I2C3_ER_IRQ 73 -#define OTG_HS_EP1_OUT_IRQ 74 -#define OTG_HS_EP1_IN_IRQ 75 -#define OTG_HS_WKUP_IRQ 76 -#define OTG_HS_IRQ 77 -#define DCMI_IRQ 78 -#define CRYP_IRQ 79 -#define HASH_RNG_IRQ 80 +#define NVIC_NVIC_WWDG_IRQ 0 +#define NVIC_PVD_IRQ 1 +#define NVIC_TAMP_STAMP_IRQ 2 +#define NVIC_RTC_WKUP_IRQ 3 +#define NVIC_FLASH_IRQ 4 +#define NVIC_RCC_IRQ 5 +#define NVIC_EXTI0_IRQ 6 +#define NVIC_EXTI1_IRQ 7 +#define NVIC_EXTI2_IRQ 8 +#define NVIC_EXTI3_IRQ 9 +#define NVIC_EXTI4_IRQ 10 +#define NVIC_DMA1_STREAM0_IRQ 11 +#define NVIC_DMA1_STREAM1_IRQ 12 +#define NVIC_DMA1_STREAM2_IRQ 13 +#define NVIC_DMA1_STREAM3_IRQ 14 +#define NVIC_DMA1_STREAM4_IRQ 15 +#define NVIC_DMA1_STREAM5_IRQ 16 +#define NVIC_DMA1_STREAM6_IRQ 17 +#define NVIC_ADC_IRQ 18 +#define NVIC_CAN1_TX_IRQ 19 +#define NVIC_CAN1_RX0_IRQ 20 +#define NVIC_CAN1_RX1_IRQ 21 +#define NVIC_CAN1_SCE_IRQ 22 +#define NVIC_EXTI9_5_IRQ 23 +#define NVIC_TIM1_BRK_TIM9_IRQ 24 +#define NVIC_TIM1_UP_TIM10_IRQ 25 +#define NVIC_TIM1_TRG_COM_TIM11_IRQ 26 +#define NVIC_TIM1_CC_IRQ 27 +#define NVIC_TIM2_IRQ 28 +#define NVIC_TIM3_IRQ 29 +#define NVIC_TIM4_IRQ 30 +#define NVIC_I2C1_EV_IRQ 31 +#define NVIC_I2C1_ER_IRQ 32 +#define NVIC_I2C2_EV_IRQ 33 +#define NVIC_I2C2_ER_IRQ 34 +#define NVIC_SPI1_IRQ 35 +#define NVIC_SPI2_IRQ 36 +#define NVIC_USART1_IRQ 37 +#define NVIC_USART2_IRQ 38 +#define NVIC_USART3_IRQ 39 +#define NVIC_EXTI15_10_IRQ 40 +#define NVIC_RTC_ALARM_IRQ 41 +#define NVIC_USB_FS_WKUP_IRQ 42 +#define NVIC_TIM8_BRK_TIM12_IRQ 43 +#define NVIC_TIM8_UP_TIM13_IRQ 44 +#define NVIC_TIM8_TRG_COM_TIM14_IRQ 45 +#define NVIC_TIM8_CC_IRQ 46 +#define NVIC_DMA1_STREAM7_IRQ 47 +#define NVIC_FSMC_IRQ 48 +#define NVIC_SDIO_IRQ 49 +#define NVIC_TIM5_IRQ 50 +#define NVIC_SPI3_IRQ 51 +#define NVIC_USART4_IRQ 52 +#define NVIC_USART5_IRQ 53 +#define NVIC_TIM6_DAC_IRQ 54 +#define NVIC_TIM7_IRQ 55 +#define NVIC_DMA2_STREAM0_IRQ 56 +#define NVIC_DMA2_STREAM1_IRQ 57 +#define NVIC_DMA2_STREAM2_IRQ 58 +#define NVIC_DMA2_STREAM3_IRQ 59 +#define NVIC_DMA2_STREAM4_IRQ 60 +#define NVIC_ETH_IRQ 61 +#define NVIC_ETH_WKUP_IRQ 62 +#define NVIC_CAN2_TX_IRQ 63 +#define NVIC_CAN2_RX0_IRQ 64 +#define NVIC_CAN2_RX1_IRQ 65 +#define NVIC_CAN2_SCE_IRQ 66 +#define NVIC_OTG_FS_IRQ 67 +#define NVIC_DMA2_STREAM5_IRQ 68 +#define NVIC_DMA2_STREAM6_IRQ 69 +#define NVIC_DMA2_STREAM7_IRQ 70 +#define NVIC_USART6_IRQ 71 +#define NVIC_I2C3_EV_IRQ 72 +#define NVIC_I2C3_ER_IRQ 73 +#define NVIC_OTG_HS_EP1_OUT_IRQ 74 +#define NVIC_OTG_HS_EP1_IN_IRQ 75 +#define NVIC_OTG_HS_WKUP_IRQ 76 +#define NVIC_OTG_HS_IRQ 77 +#define NVIC_DCMI_IRQ 78 +#define NVIC_CRYP_IRQ 79 +#define NVIC_HASH_RNG_IRQ 80 #endif diff --git a/include/libopencm3/stm32/f2/syscfg.h b/include/libopencm3/stm32/f2/syscfg.h new file mode 100644 index 00000000..b0d93f9c --- /dev/null +++ b/include/libopencm3/stm32/f2/syscfg.h @@ -0,0 +1,46 @@ +/* + * This file is part of the libopencm3 project. + * + * Copyright (C) 2011 Fergus Noble + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ + +#ifndef LIBOPENCM3_SYSCFG_H +#define LIBOPENCM3_SYSCFG_H + +#include + +/* --- SYSCFG registers ------------------------------------------------------ */ + +#define SYSCFG_MEMRM MMIO32(SYSCFG_BASE + 0x00) + +#define SYSCFG_PMC MMIO32(SYSCFG_BASE + 0x04) + +/* External interrupt configuration register 1 (SYSCFG_EXTICR1) */ +#define SYSCFG_EXTICR1 MMIO32(SYSCFG_BASE + 0x08) + +/* External interrupt configuration register 2 (SYSCFG_EXTICR2) */ +#define SYSCFG_EXTICR2 MMIO32(SYSCFG_BASE + 0x0c) + +/* External interrupt configuration register 3 (SYSCFG_EXTICR3) */ +#define SYSCFG_EXTICR3 MMIO32(SYSCFG_BASE + 0x10) + +/* External interrupt configuration register 4 (SYSCFG_EXTICR4) */ +#define SYSCFG_EXTICR4 MMIO32(SYSCFG_BASE + 0x14) + +#define SYSCFG_CMPCR MMIO32(SYSCFG_BASE + 0x20) + +#endif + diff --git a/lib/stm32_common/usart.c b/lib/stm32_common/usart.c index 026af3af..116b1596 100644 --- a/lib/stm32_common/usart.c +++ b/lib/stm32_common/usart.c @@ -116,9 +116,8 @@ void usart_wait_recv_ready(u32 usart) void usart_send_blocking(u32 usart, u16 data) { - usart_send(usart, data); - usart_wait_send_ready(usart); + usart_send(usart, data); } u16 usart_recv_blocking(u32 usart) diff --git a/lib/stm32f1/exti.c b/lib/stm32f1/exti.c index 969cae4c..e4e97486 100644 --- a/lib/stm32f1/exti.c +++ b/lib/stm32f1/exti.c @@ -69,7 +69,7 @@ void exti_reset_request(u32 extis) * Remap an external interrupt line to the corresponding pin on the * specified GPIO port. * - * TODO: This could be rewritten in less lines of code. + * TODO: This could be rewritten in fewer lines of code. */ void exti_select_source(u32 exti, u32 gpioport) { diff --git a/lib/stm32f1/gpio.c b/lib/stm32f1/gpio.c index cd6be9bf..f1ea12c0 100644 --- a/lib/stm32f1/gpio.c +++ b/lib/stm32f1/gpio.c @@ -90,7 +90,7 @@ u16 gpio_get(u32 gpioport, u16 gpios) void gpio_toggle(u32 gpioport, u16 gpios) { - GPIO_ODR(gpioport) = GPIO_IDR(gpioport) ^ gpios; + GPIO_ODR(gpioport) ^= gpios; } u16 gpio_port_read(u32 gpioport) diff --git a/lib/stm32f2/Makefile b/lib/stm32f2/Makefile index 98ba8789..496f4a54 100644 --- a/lib/stm32f2/Makefile +++ b/lib/stm32f2/Makefile @@ -28,7 +28,7 @@ CFLAGS = -Os -g -Wall -Wextra -I../../include -fno-common \ -ffunction-sections -fdata-sections -MD -DSTM32F2 # ARFLAGS = rcsv ARFLAGS = rcs -OBJS = vector.o gpio.o systick.o i2c.o spi.o nvic.o usart.o rcc.o flash.o +OBJS = vector.o gpio.o systick.o i2c.o spi.o nvic.o usart.o exti.o rcc.o flash.o #VPATH += ../usb VPATH += ../stm32_common diff --git a/lib/stm32f2/exti.c b/lib/stm32f2/exti.c new file mode 100644 index 00000000..1db9ad78 --- /dev/null +++ b/lib/stm32f2/exti.c @@ -0,0 +1,146 @@ +/* + * This file is part of the libopencm3 project. + * + * Copyright (C) 2010 Mark Butler + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ + +#include +#include +#include + +void exti_set_trigger(u32 extis, exti_trigger_type trig) +{ + switch (trig) { + case EXTI_TRIGGER_RISING: + EXTI_RTSR |= extis; + EXTI_FTSR &= ~extis; + break; + case EXTI_TRIGGER_FALLING: + EXTI_RTSR &= ~extis; + EXTI_FTSR |= extis; + break; + case EXTI_TRIGGER_BOTH: + EXTI_RTSR |= extis; + EXTI_FTSR |= extis; + break; + } +} + +void exti_enable_request(u32 extis) +{ + /* Enable interrupts. */ + EXTI_IMR |= extis; + + /* Enable events. */ + EXTI_EMR |= extis; +} + +void exti_disable_request(u32 extis) +{ + /* Disable interrupts. */ + EXTI_IMR &= ~extis; + + /* Disable events. */ + EXTI_EMR &= ~extis; +} + +/* + * Reset the interrupt request by writing a 1 to the corresponding + * pending bit register. + */ +void exti_reset_request(u32 extis) +{ + EXTI_PR = extis; +} + +/* + * Remap an external interrupt line to the corresponding pin on the + * specified GPIO port. + * + * TODO: This could be rewritten in fewer lines of code. + */ +void exti_select_source(u32 exti, u32 gpioport) +{ + u8 shift, bits; + + shift = bits = 0; + + switch (exti) { + case EXTI0: + case EXTI4: + case EXTI8: + case EXTI12: + shift = 0; + break; + case EXTI1: + case EXTI5: + case EXTI9: + case EXTI13: + shift = 4; + break; + case EXTI2: + case EXTI6: + case EXTI10: + case EXTI14: + shift = 8; + break; + case EXTI3: + case EXTI7: + case EXTI11: + case EXTI15: + shift = 12; + break; + } + + switch (gpioport) { + case GPIOA: + bits = 0xf; + break; + case GPIOB: + bits = 0xe; + break; + case GPIOC: + bits = 0xd; + break; + case GPIOD: + bits = 0xc; + break; + case GPIOE: + bits = 0xb; + break; + case GPIOF: + bits = 0xa; + break; + case GPIOG: + bits = 0x9; + break; + } + + /* Ensure that only valid EXTI lines are used. */ + if (exti < EXTI4) { + SYSCFG_EXTICR1 &= ~(0x000F << shift); + SYSCFG_EXTICR1 |= (~bits << shift); + } else if (exti < EXTI8) { + SYSCFG_EXTICR2 &= ~(0x000F << shift); + SYSCFG_EXTICR2 |= (~bits << shift); + } else if (exti < EXTI12) { + SYSCFG_EXTICR3 &= ~(0x000F << shift); + SYSCFG_EXTICR3 |= (~bits << shift); + } else if (exti < EXTI16) { + SYSCFG_EXTICR4 &= ~(0x000F << shift); + SYSCFG_EXTICR4 |= (~bits << shift); + } +}