lpc43xx/uart: Fix TER register definition
I'm not sure why bit 7 and offset 0x30 were used previously. Revision 1.6 of UM10503 claims that the TXEN bit is bit 0 in all UARTs' TER registers.
This commit is contained in:
committed by
Piotr Esden-Tempski
parent
dbf9c3bc39
commit
fa47bb80d5
@@ -94,25 +94,13 @@ void uart_init(uart_num_t uart_num,
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}
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/* Wait end of TX & disable TX */
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if(uart_num == UART1_NUM)
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{
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UART_TER_UART1(uart_port) = UART1_TER_TXEN;
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UART_TER(uart_port) = UART_TER_TXEN;
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/* Wait for current transmit complete */
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while (!(UART_LSR(uart_port) & UART_LSR_THRE));
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/* Wait for current transmit complete */
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while (!(UART_LSR(uart_port) & UART_LSR_THRE));
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/* Disable Tx */
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UART_TER_UART1(uart_port) = 0;
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}else
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{
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UART_TER(uart_port) = UART0_2_3_TER_TXEN;
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/* Wait for current transmit complete */
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while (!(UART_LSR(uart_port) & UART_LSR_THRE));
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/* Disable Tx */
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UART_TER(uart_port) = 0;
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}
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/* Disable Tx */
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UART_TER(uart_port) = 0;
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/* Disable interrupt */
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UART_IER(uart_port) = 0;
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@@ -153,13 +141,7 @@ void uart_init(uart_num_t uart_num,
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UART_LCR(uart_port) = (lcr_config & UART_LCR_BITMASK);
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/* Enable TX */
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if(uart_num == UART1_NUM)
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{
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UART_TER_UART1(uart_port) = UART1_TER_TXEN;
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}else
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{
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UART_TER(uart_port) = UART0_2_3_TER_TXEN;
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}
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UART_TER(uart_port) = UART_TER_TXEN;
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}
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/*
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