EMTime/libopencm3
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

stm32: adc-v2: pull up regular sequence setting.

Browse Source 
Uses more standardized naming, fills in some missing defintions, removes some
redundant definitions.
This commit is contained in:
Karl Palsson
2016-03-03 23:30:33 +00:00
parent f9b2ffe8cf
commit f40e34680b
4 changed files with 66 additions and 119 deletions
Download Patch File Download Diff File Expand all files Collapse all files

44
lib/stm32/common/adc_common_v2_multi.c
View File

@@ -83,3 +83,47 @@ void adc_set_sample_time_on_all_channels(uint32_t adc, uint8_t time)
}
ADC_SMPR2(adc) = reg32;
}
/*---------------------------------------------------------------------------*/
/** @brief ADC Set a Regular Channel Conversion Sequence
*
* Define a sequence of channels to be converted as a regular group with a
* length from 1 to 16 channels. If this is called during conversion, the
* current conversion is reset and conversion begins again with the newly
* defined group.
*
* @param[in] adc ADC block register address base @ref adc_reg_base
* @param[in] length Number of channels in the group, range 0..16
* @param[in] channel Set of channels in sequence, range @ref adc_channel
*/
void adc_set_regular_sequence(uint32_t adc, uint8_t length, uint8_t channel[])
{
uint32_t reg32_1 = 0, reg32_2 = 0, reg32_3 = 0, reg32_4 = 0;
uint8_t i = 0;
/* Maximum sequence length is 16 channels. */
if (length > 16) {
return;
}
for (i = 1; i <= length; i++) {
if (i <= 4) {
reg32_1 |= (channel[i - 1] << (i * 6));
}
if ((i > 4) & (i <= 9)) {
reg32_2 |= (channel[i - 1] << ((i - 4 - 1) * 6));
}
if ((i > 9) & (i <= 14)) {
reg32_3 |= (channel[i - 1] << ((i - 9 - 1) * 6));
}
if ((i > 14) & (i <= 16)) {
reg32_4 |= (channel[i - 1] << ((i - 14 - 1) * 6));
}
}
reg32_1 |= ((length - 1) << ADC_SQR1_L_SHIFT);
ADC_SQR1(adc) = reg32_1;
ADC_SQR2(adc) = reg32_2;
ADC_SQR3(adc) = reg32_3;
ADC_SQR4(adc) = reg32_4;
}

46
lib/stm32/f3/adc.c
View File

@@ -488,52 +488,6 @@ void adc_set_watchdog_low_threshold(uint32_t adc, uint8_t threshold)
ADC_TR3(adc) = reg32;
}
/*---------------------------------------------------------------------------*/
/** @brief ADC Set a Regular Channel Conversion Sequence
*
* Define a sequence of channels to be converted as a regular group with a
* length from 1 to 16 channels. If this is called during conversion, the
* current conversion is reset and conversion begins again with the newly
* defined group.
*
* @param[in] adc Unsigned int32. ADC block register address base
* @ref adc_reg_base
* @param[in] length Unsigned int8. Number of channels in the group.
* @param[in] channel Unsigned int8[]. Set of channels in sequence, integers
* 0..18.
*/
void adc_set_regular_sequence(uint32_t adc, uint8_t length, uint8_t channel[])
{
uint32_t reg32_1 = 0, reg32_2 = 0, reg32_3 = 0, reg32_4 = 0;
uint8_t i = 0;
/* Maximum sequence length is 16 channels. */
if (length > 16) {
return;
}
for (i = 1; i <= length; i++) {
if (i <= 4) {
reg32_1 |= (channel[i - 1] << (i * 6));
}
if ((i > 4) & (i <= 9)) {
reg32_2 |= (channel[i - 1] << ((i - 4 - 1) * 6));
}
if ((i > 9) & (i <= 14)) {
reg32_3 |= (channel[i - 1] << ((i - 9 - 1) * 6));
}
if ((i > 14) & (i <= 16)) {
reg32_4 |= (channel[i - 1] << ((i - 14 - 1) * 6));
}
}
reg32_1 |= ((length - 1) << ADC_SQR1_L_LSB);
ADC_SQR1(adc) = reg32_1;
ADC_SQR2(adc) = reg32_2;
ADC_SQR3(adc) = reg32_3;
ADC_SQR4(adc) = reg32_4;
}
/*---------------------------------------------------------------------------*/
/** @brief ADC Set an Injected Channel Conversion Sequence