doc: stm32: rcc: improve intellisense
Removed newline between the comment block and function definition It enables vscode intellisense to display documentation about functions Reviewed-by: Karl Palsson <karlp@tweak.au>
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Karl Palsson
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@@ -24,7 +24,6 @@
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#include <libopencm3/stm32/rcc.h>
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/*---------------------------------------------------------------------------*/
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/** @brief RCC Enable Peripheral Clocks.
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*
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* Enable the clock on particular peripherals. There are three registers
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@@ -42,13 +41,11 @@
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* @li If register is RCC_APB1ENR, from @ref rcc_apb1enr_en
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* @li If register is RCC_APB2ENR, from @ref rcc_apb2enr_en
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*/
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void rcc_peripheral_enable_clock(volatile uint32_t *reg, uint32_t en)
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{
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*reg |= en;
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}
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/*---------------------------------------------------------------------------*/
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/** @brief RCC Disable Peripheral Clocks.
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*
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* Disable the clock on particular peripherals. There are three registers
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@@ -71,7 +68,6 @@ void rcc_peripheral_disable_clock(volatile uint32_t *reg, uint32_t en)
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*reg &= ~en;
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}
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/*---------------------------------------------------------------------------*/
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/** @brief RCC Reset Peripherals.
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*
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* Reset particular peripherals. There are three registers involved, each one
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@@ -94,7 +90,6 @@ void rcc_peripheral_reset(volatile uint32_t *reg, uint32_t reset)
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*reg |= reset;
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}
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/*---------------------------------------------------------------------------*/
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/** @brief RCC Remove Reset on Peripherals.
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*
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* Remove the reset on particular peripherals. There are three registers
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@@ -121,7 +116,6 @@ void rcc_peripheral_clear_reset(volatile uint32_t *reg, uint32_t clear_reset)
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#define _RCC_REG(i) MMIO32(RCC_BASE + ((i) >> 5))
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#define _RCC_BIT(i) (1 << ((i) & 0x1f))
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/*---------------------------------------------------------------------------*/
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/** @brief Enable Peripheral Clock in running mode.
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*
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* Enable the clock on particular peripheral.
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@@ -130,13 +124,11 @@ void rcc_peripheral_clear_reset(volatile uint32_t *reg, uint32_t clear_reset)
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*
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* For available constants, see #rcc_periph_clken (RCC_UART1 for example)
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*/
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void rcc_periph_clock_enable(enum rcc_periph_clken clken)
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{
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_RCC_REG(clken) |= _RCC_BIT(clken);
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}
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/*---------------------------------------------------------------------------*/
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/** @brief Disable Peripheral Clock in running mode.
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* Disable the clock on particular peripheral.
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*
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@@ -144,13 +136,11 @@ void rcc_periph_clock_enable(enum rcc_periph_clken clken)
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*
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* For available constants, see #rcc_periph_clken (RCC_UART1 for example)
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*/
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void rcc_periph_clock_disable(enum rcc_periph_clken clken)
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{
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_RCC_REG(clken) &= ~_RCC_BIT(clken);
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}
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/*---------------------------------------------------------------------------*/
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/** @brief Reset Peripheral, pulsed
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*
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* Reset particular peripheral, and restore to working state.
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@@ -159,14 +149,12 @@ void rcc_periph_clock_disable(enum rcc_periph_clken clken)
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*
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* For available constants, see #rcc_periph_rst (RST_UART1 for example)
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*/
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void rcc_periph_reset_pulse(enum rcc_periph_rst rst)
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{
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_RCC_REG(rst) |= _RCC_BIT(rst);
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_RCC_REG(rst) &= ~_RCC_BIT(rst);
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}
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/*---------------------------------------------------------------------------*/
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/** @brief Reset Peripheral, hold
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*
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* Reset particular peripheral, and hold in reset state.
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@@ -175,13 +163,11 @@ void rcc_periph_reset_pulse(enum rcc_periph_rst rst)
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*
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* For available constants, see #rcc_periph_rst (RST_UART1 for example)
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*/
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void rcc_periph_reset_hold(enum rcc_periph_rst rst)
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{
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_RCC_REG(rst) |= _RCC_BIT(rst);
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}
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/*---------------------------------------------------------------------------*/
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/** @brief Reset Peripheral, release
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*
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* Restore peripheral from reset state to working state.
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@@ -190,7 +176,6 @@ void rcc_periph_reset_hold(enum rcc_periph_rst rst)
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*
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* For available constants, see #rcc_periph_rst (RST_UART1 for example)
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*/
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void rcc_periph_reset_release(enum rcc_periph_rst rst)
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{
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_RCC_REG(rst) &= ~_RCC_BIT(rst);
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@@ -203,7 +188,6 @@ void rcc_periph_reset_release(enum rcc_periph_rst rst)
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*
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* @param[in] mcosrc the unshifted source bits
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*/
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void rcc_set_mco(uint32_t mcosrc)
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{
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RCC_CFGR = (RCC_CFGR & ~(RCC_CFGR_MCO_MASK << RCC_CFGR_MCO_SHIFT)) |
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