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stm32f3: flash_common_f24 now includes f3 support. Also, renamed to f234.

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- Makefiles of other stm32s updated accordingly.
- f3/rcc.c updated to some definition changes.
- f3/flash.c removed in order to use flash_common_f234.c to comply with new organization.
This commit is contained in:
Federico Ruiz Ugalde
2013-06-26 04:44:47 -06:00
committed by Piotr Esden-Tempski
parent 74a313625f
commit efe08e4898
11 changed files with 98 additions and 323 deletions
Download Patch File Download Diff File Expand all files Collapse all files

54
lib/stm32/common/flash_common_f24.c → lib/stm32/common/flash_common_f234.c
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@@ -20,6 +20,7 @@
#include <libopencm3/stm32/flash.h>
#if !defined(STM32F3)
static inline void flash_set_program_size(uint32_t psize)
{
FLASH_CR &= ~(((1 << 0) | (1 << 1)) << 8);
@@ -66,6 +67,24 @@ void flash_icache_reset(void)
FLASH_ACR |= FLASH_ACR_ICRST;
}
void flash_clear_pgserr_flag(void)
{
FLASH_SR |= FLASH_SR_PGSERR;
}
void flash_clear_pgaerr_flag(void)
{
FLASH_SR |= FLASH_SR_PGAERR;
}
void flash_clear_wrperr_flag(void)
{
FLASH_SR |= FLASH_SR_WRPERR;
}
#endif
void flash_set_ws(uint32_t ws)
{
uint32_t reg32;
@@ -91,31 +110,16 @@ void flash_lock(void)
FLASH_CR |= FLASH_CR_LOCK;
}
void flash_clear_pgserr_flag(void)
{
FLASH_SR |= FLASH_SR_PGSERR;
}
void flash_clear_pgperr_flag(void)
{
FLASH_SR |= FLASH_SR_PGPERR;
}
void flash_clear_pgaerr_flag(void)
{
FLASH_SR |= FLASH_SR_PGAERR;
}
void flash_clear_eop_flag(void)
{
FLASH_SR |= FLASH_SR_EOP;
}
void flash_clear_wrperr_flag(void)
{
FLASH_SR |= FLASH_SR_WRPERR;
}
void flash_clear_bsy_flag(void)
{
FLASH_SR &= ~FLASH_SR_BSY;
@@ -123,14 +127,23 @@ void flash_clear_bsy_flag(void)
void flash_clear_status_flags(void)
{
#if !defined(STM32F3)
flash_clear_pgserr_flag();
flash_clear_pgperr_flag();
flash_clear_pgaerr_flag();
flash_clear_eop_flag();
flash_clear_wrperr_flag();
#endif
flash_clear_pgperr_flag();
flash_clear_eop_flag();
flash_clear_bsy_flag();
}
void flash_wait_for_last_operation(void)
{
while ((FLASH_SR & FLASH_SR_BSY) == FLASH_SR_BSY);
}
#if !defined(STM32F3)
void flash_unlock_option_bytes(void)
{
/* Clear the unlock state. */
@@ -146,11 +159,6 @@ void flash_lock_option_bytes(void)
FLASH_OPTCR |= FLASH_OPTCR_OPTLOCK;
}
void flash_wait_for_last_operation(void)
{
while ((FLASH_SR & FLASH_SR_BSY) == FLASH_SR_BSY);
}
void flash_program_double_word(uint32_t address, uint64_t data)
{
/* Ensure that all flash operations are complete. */
@@ -267,3 +275,5 @@ void flash_program_option_bytes(uint32_t data)
FLASH_OPTCR |= FLASH_OPTCR_OPTSTRT; /* Enable option byte prog. */
flash_wait_for_last_operation();
}
#endif

2
lib/stm32/f2/Makefile
View File

@@ -39,7 +39,7 @@ OBJS += crc_common_all.o dac_common_all.o dma_common_f24.o \
gpio_common_all.o gpio_common_f234.o i2c_common_all.o \
iwdg_common_all.o rtc_common_bcd.o spi_common_all.o \
timer_common_all.o timer_common_f24.o usart_common_all.o \
flash_common_f24.o hash_common_f24.o crypto_common_f24.o
flash_common_f234.o hash_common_f24.o crypto_common_f24.o
VPATH += ../../usb:../:../../cm3:../common

4
lib/stm32/f3/Makefile
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@@ -34,12 +34,12 @@ CFLAGS = -Os -g \
# ARFLAGS = rcsv
ARFLAGS = rcs
OBJS = rcc.o gpio.o flash.o adc.o exti2.o
OBJS = rcc.o gpio.o adc.o exti2.o
OBJS += gpio_common_all.o gpio_common_f234.o i2c_common_all.o\
dac_common_all.o usart_common_all.o crc_common_all.o\
iwdg_common_all.o spi_common_all.o dma_common_f13.o\
timer_common_all.o timer_common_f24.o
timer_common_all.o timer_common_f24.o flash_common_f234.o
VPATH += ../../usb:../:../../cm3:../common

178
lib/stm32/f3/flash.c
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@@ -1,178 +0,0 @@
/*
* This file is part of the libopencm3 project.
*
* Copyright (C) 2010 Thomas Otto <tommi@viadmin.org>
* Copyright (C) 2010 Mark Butler <mbutler@physics.otago.ac.nz>
*
* This library is free software: you can redistribute it and/or modify
* it under the terms of the GNU Lesser General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU Lesser General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public License
* along with this library. If not, see <http://www.gnu.org/licenses/>.
*/
#include <libopencm3/stm32/f3/flash.h>
/* This function is probably wrong, since deactivated. Please check and fix!
static inline void flash_set_program_size(uint32_t psize)
{
FLASH_CR &= ~(((1 << 0) | (1 << 1)) << 8);
FLASH_CR |= psize;
}
*/
void flash_set_ws(uint32_t ws)
{
uint32_t reg32;
reg32 = FLASH_ACR;
reg32 &= ~((1 << 0) | (1 << 1) | (1 << 2));
reg32 |= ws;
FLASH_ACR = reg32;
}
void flash_unlock(void)
{
/* Authorize the FPEC access. */
FLASH_KEYR = FLASH_KEY1;
FLASH_KEYR = FLASH_KEY2;
}
void flash_lock(void)
{
FLASH_CR |= FLASH_LOCK;
}
void flash_clear_pgperr_flag(void)
{
FLASH_SR |= FLASH_PGPERR;
}
void flash_clear_eop_flag(void)
{
FLASH_SR |= FLASH_EOP;
}
void flash_clear_bsy_flag(void)
{
FLASH_SR &= ~FLASH_BSY;
}
void flash_clear_status_flags(void)
{
flash_clear_pgperr_flag();
flash_clear_eop_flag();
flash_clear_bsy_flag();
}
void flash_wait_for_last_operation(void)
{
while ((FLASH_SR & FLASH_BSY) == FLASH_BSY)
;
}
/* Functions deactivated because flash_set_program_size function may not be */
/* working well */
/* void flash_program_double_word(uint32_t address, u64 data, uint32_t program_size) */
/* { */
/* /\* Ensure that all flash operations are complete. *\/ */
/* flash_wait_for_last_operation(); */
/* flash_set_program_size(program_size); */
/* /\* Enable writes to flash. *\/ */
/* FLASH_CR |= FLASH_PG; */
/* /\* Program the first half of the word. *\/ */
/* MMIO64(address) = data; */
/* /\* Wait for the write to complete. *\/ */
/* flash_wait_for_last_operation(); */
/* /\* Disable writes to flash. *\/ */
/* FLASH_CR &= ~FLASH_PG; */
/* } */
/* void flash_program_word(uint32_t address, uint32_t data, uint32_t program_size) */
/* { */
/* /\* Ensure that all flash operations are complete. *\/ */
/* flash_wait_for_last_operation(); */
/* flash_set_program_size(program_size); */
/* /\* Enable writes to flash. *\/ */
/* FLASH_CR |= FLASH_PG; */
/* /\* Program the first half of the word. *\/ */
/* MMIO32(address) = data; */
/* /\* Wait for the write to complete. *\/ */
/* flash_wait_for_last_operation(); */
/* /\* Disable writes to flash. *\/ */
/* FLASH_CR &= ~FLASH_PG; */
/* } */
/* void flash_program_half_word(uint32_t address, u16 data, uint32_t program_size) */
/* { */
/* flash_wait_for_last_operation(); */
/* flash_set_program_size(program_size); */
/* FLASH_CR |= FLASH_PG; */
/* MMIO16(address) = data; */
/* flash_wait_for_last_operation(); */
/* FLASH_CR &= ~FLASH_PG; /\* Disable the PG bit. *\/ */
/* } */
/* void flash_program_byte(uint32_t address, u8 data, uint32_t program_size) */
/* { */
/* flash_wait_for_last_operation(); */
/* flash_set_program_size(program_size); */
/* FLASH_CR |= FLASH_PG; */
/* MMIO8(address) = data; */
/* flash_wait_for_last_operation(); */
/* FLASH_CR &= ~FLASH_PG; /\* Disable the PG bit. *\/ */
/* } */
/* void flash_erase_page(uint32_t page, uint32_t program_size) */
/* { */
/* flash_wait_for_last_operation(); */
/* flash_set_program_size(program_size); */
/* FLASH_CR &= ~(((1 << 0) | (1 << 1) | (1 << 2) | (1 << 3)) << 3); */
/* FLASH_CR |= page; */
/* FLASH_CR |= FLASH_PER; */
/* FLASH_CR |= FLASH_STRT; */
/* flash_wait_for_last_operation(); */
/* FLASH_CR &= ~FLASH_PER; */
/* FLASH_CR &= ~(((1 << 0) | (1 << 1) | (1 << 2) | (1 << 3)) << 3); */
/* } */
/* void flash_erase_all_pages(uint32_t program_size) */
/* { */
/* flash_wait_for_last_operation(); */
/* flash_set_program_size(program_size); */
/* FLASH_CR |= FLASH_MER; /\* Enable mass erase. *\/ */
/* FLASH_CR |= FLASH_STRT; /\* Trigger the erase. *\/ */
/* flash_wait_for_last_operation(); */
/* FLASH_CR &= ~FLASH_MER; /\* Disable mass erase. *\/ */
/* } */

4
lib/stm32/f3/rcc.c
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@@ -38,7 +38,7 @@ const clock_scale_t hsi_8mhz[CLOCK_END] =
.ppre1 = RCC_CFGR_PPRE1_DIV_2,
.ppre2 = RCC_CFGR_PPRE2_DIV_NONE,
.power_save = 1,
.flash_config = FLASH_PRFTBE | FLASH_LATENCY_2WS,
.flash_config = FLASH_ACR_PRFTBE | FLASH_ACR_LATENCY_2WS,
.apb1_frequency = 22000000,
.apb2_frequency = 44000000,
},
@@ -49,7 +49,7 @@ const clock_scale_t hsi_8mhz[CLOCK_END] =
.ppre1 = RCC_CFGR_PPRE1_DIV_2,
.ppre2 = RCC_CFGR_PPRE2_DIV_NONE,
.power_save = 1,
.flash_config = FLASH_PRFTBE| FLASH_LATENCY_3WS,
.flash_config = FLASH_ACR_PRFTBE| FLASH_ACR_LATENCY_3WS,
.apb1_frequency = 32000000,
.apb2_frequency = 64000000,
}

2
lib/stm32/f4/Makefile
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@@ -40,7 +40,7 @@ OBJS += crc_common_all.o dac_common_all.o dma_common_f24.o \
gpio_common_all.o gpio_common_f234.o i2c_common_all.o \
iwdg_common_all.o pwr_common_all.o rtc_common_bcd.o \
spi_common_all.o timer_common_all.o timer_common_f24.o \
usart_common_all.o flash_common_f24.o hash_common_f24.o \
usart_common_all.o flash_common_f234.o hash_common_f24.o \
crypto_common_f24.o
OBJS += usb.o usb_standard.o usb_control.o usb_fx07_common.o \