stm32: unify i2c implementations
The f1, f2, f4, l1 chip families have a similar "v1" i2c peripheral on board. More recent f0, f3, l0, l3 chip families share another "v2" version of i2c. This patch unifies headers and implementation for two types of i2c peripherals: - rename: i2c_common_all.[ch] to i2c_common_v1.[ch] - remove i2c_common_f24.h: extra I2C blocks are defined in specific headers - use f3 i2c code as a basis for common "v2" i2c implementation - add f0 i2c support: use "v2" i2c implementation Tests: - tested on a custom f0 board - compile-tested both libopencm3 and libopencm3-examples for all stm32 Signed-off-by: Sergey Matyukevich <geomatsi@gmail.com>
This commit is contained in:
Sergey Matyukevich
committed by
Karl Palsson
Karl Palsson
parent
43736cf03f
commit
ef91856ac1
@@ -32,225 +32,7 @@
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#ifndef LIBOPENCM3_I2C_H
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#define LIBOPENCM3_I2C_H
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/*****************************************************************************/
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/* Module definitions */
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/*****************************************************************************/
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#define I2C1 I2C1_BASE
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#define I2C2 I2C2_BASE
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/*****************************************************************************/
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/* Register definitions */
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/*****************************************************************************/
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#define I2C_CR1(i2c_base) MMIO32((i2c_base) + 0x00)
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#define I2C1_CR1 I2C_CR1(I2C1)
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#define I2C2_CR1 I2C_CR1(I2C2)
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#define I2C_CR2(i2c_base) MMIO32((i2c_base) + 0x04)
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#define I2C1_CR2 I2C_CR2(I2C1)
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#define I2C2_CR2 I2C_CR2(I2C2)
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#define I2C_OAR1(i2c_base) MMIO32((i2c_base) + 0x08)
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#define I2C1_OAR1 I2C_OAR1(I2C1)
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#define I2C2_OAR1 I2C_OAR1(I2C2)
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#define I2C_OAR2(i2c_base) MMIO32((i2c_base) + 0x0c)
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#define I2C1_OAR2 I2C_OAR2(I2C1)
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#define I2C2_OAR2 I2C_OAR2(I2C2)
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#define I2C_TIMINGR(i2c_base) MMIO32((i2c_base) + 0x10)
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#define I2C1_TIMINGR I2C_TIMINGR(I2C1)
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#define I2C2_TIMINGR I2C_TIMINGR(I2C2)
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#define I2C_TIMEOUTR(i2c_base) MMIO32((i2c_base) + 0x14)
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#define I2C1_TIMEOUTR I2C_TIMEOUTR(I2C1)
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#define I2C2_TIMEOUTR I2C_TIMEOUTR(I2C2)
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#define I2C_ISR(i2c_base) MMIO32((i2c_base) + 0x18)
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#define I2C1_ISR I2C_ISR(I2C1)
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#define I2C2_ISR I2C_ISR(I2C2)
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#define I2C_ICR(i2c_base) MMIO32((i2c_base) + 0x1C)
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#define I2C1_ICR I2C_ICR(I2C1)
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#define I2C2_ICR I2C_ICR(I2C2)
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#define I2C_PECR(i2c_base) MMIO8((i2c_base) + 0x20)
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#define I2C1_PECR I2C_PECR(I2C1)
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#define I2C2_PECR I2C_PECR(I2C2)
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#define I2C_RXDR(i2c_base) MMIO8((i2c_base) + 0x24)
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#define I2C1_RXDR I2C_RXDR(I2C1)
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#define I2C2_RXDR I2C_RXDR(I2C2)
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#define I2C_TXDR(i2c_base) MMIO8((i2c_base) + 0x28)
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#define I2C1_TXDR I2C_TXDR(I2C1)
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#define I2C2_TXDR I2C_TXDR(I2C2)
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/*****************************************************************************/
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/* Register values */
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/*****************************************************************************/
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/* I2C_CR1 values ---------------------------------------------------------- */
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#define I2C_CR1_PECEN (1 << 23)
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#define I2C_CR1_ALERTEN (1 << 22)
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#define I2C_CR1_SMBDEN (1 << 21)
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#define I2C_CR1_SMBHEN (1 << 20)
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#define I2C_CR1_GCEN (1 << 19)
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#define I2C_CR1_WUPEN (1 << 18)
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#define I2C_CR1_NOSTRETCH (1 << 17)
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#define I2C_CR1_SBC (1 << 16)
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#define I2C_CR1_RXDMAEN (1 << 15)
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#define I2C_CR1_TXDMAEN (1 << 14)
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#define I2C_CR1_ANFOFF (1 << 12)
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#define I2C_CR1_DNF_SHIFT 8
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#define I2C_CR1_DNF (0x0F << I2C_CR1_DNF_SHIFT)
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#define I2C_CR1_DNF_VAL(x) ((x) << I2C_CR1_DNF_SHIFT)
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#define I2C_CR1_ERRIE (1 << 7)
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#define I2C_CR1_TCIE (1 << 6)
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#define I2C_CR1_STOPIE (1 << 5)
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#define I2C_CR1_NACKIE (1 << 4)
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#define I2C_CR1_ADDRIE (1 << 3)
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#define I2C_CR1_RXIE (1 << 2)
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#define I2C_CR1_TXIE (1 << 1)
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#define I2C_CR1_PE (1 << 0)
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/* I2C_CR2 values ---------------------------------------------------------- */
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#define I2C_CR2_PECBYTE (1 << 26)
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#define I2C_CR2_AUTOEND (1 << 25)
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#define I2C_CR2_RELOAD (1 << 24)
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#define I2C_CR2_NBYTES_SHIFT 16
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#define I2C_CR2_NBYTES (0xFF << I2C_CR2_NBYTES_SHIFT)
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#define I2C_CR2_NBYTES_VAL(x) ((x) << I2C_CR2_NBYTES_SHIFT)
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#define I2C_CR2_NACK (1 << 15)
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#define I2C_CR2_STOP (1 << 14)
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#define I2C_CR2_START (1 << 13)
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#define I2C_CR2_HEAD10R (1 << 12)
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#define I2C_CR2_ADD10 (1 << 11)
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#define I2C_CR2_RD_WRN (1 << 10)
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#define I2C_CR2_SADD_SHIFT 0
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#define I2C_CR2_SADD (0x3FF << I2C_CR2_SADD_SHIFT)
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#define I2C_CR2_SADD_VAL(x) ((x) << I2C_CR2_SADD_SHIFT)
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/* I2C_OAR1 values --------------------------------------------------------- */
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#define I2C_OAR1_OA1EN (1 << 15)
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#define I2C_OAR1_OA1MODE (1 << 10)
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#define I2C_OAR1_OA1_SHIFT 0
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#define I2C_OAR1_OA1 (0x3FF << I2C_OAR1_OA1_SHIFT)
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#define I2C_OAR1_OA1_VAL(x) ((x) << I2C_OAR1_OA1_SHIFT)
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/* I2C_OAR2 values --------------------------------------------------------- */
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#define I2C_OAR2_OA1EN (1 << 15)
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#define I2C_OAR2_OA2MSK_SHIFT 8
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#define I2C_OAR2_OA2MSK (7 << I2C_OAR2_OA2MSK_SHIFT)
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#define I2C_OAR2_OA2MSK_NOMASK (0 << I2C_OAR2_OA2MSK_SHIFT)
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#define I2C_OAR2_OA2MSK_1_BIT (1 << I2C_OAR2_OA2MSK_SHIFT)
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#define I2C_OAR2_OA2MSK_2_BIT (2 << I2C_OAR2_OA2MSK_SHIFT)
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#define I2C_OAR2_OA2MSK_3_BIT (3 << I2C_OAR2_OA2MSK_SHIFT)
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#define I2C_OAR2_OA2MSK_4_BIT (4 << I2C_OAR2_OA2MSK_SHIFT)
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#define I2C_OAR2_OA2MSK_5_BIT (5 << I2C_OAR2_OA2MSK_SHIFT)
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#define I2C_OAR2_OA2MSK_6_BIT (6 << I2C_OAR2_OA2MSK_SHIFT)
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#define I2C_OAR2_OA2MSK_ALL (7 << I2C_OAR2_OA2MSK_SHIFT)
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#define I2C_OAR2_OA2_SHIFT 1
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#define I2C_OAR2_OA2 (0x7F << I2C_OAR2_OA2_SHIFT)
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#define I2C_OAR2_OA2_VAL(x) ((x) << I2C_OAR2_OA2_SHIFT)
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/* I2C_TIMINGR values ------------------------------------------------------ */
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#define I2C_TIMINGR_PRESC_SHIFT 28
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#define I2C_TIMINGR_PRESC (0x0F << I2C_TIMINGR_PRESC_SHIFT)
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#define I2C_TIMINGR_PRESC_VAL(x) ((x) << I2C_TIMINGR_PRESC_SHIFT)
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#define I2C_TIMINGR_SCLDEL_SHIFT 20
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#define I2C_TIMINGR_SCLDEL (0x0F << I2C_TIMINGR_SCLDEL_SHIFT)
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#define I2C_TIMINGR_SCLDEL_VAL(x) ((x) << I2C_TIMINGR_SCLDEL_SHIFT)
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#define I2C_TIMINGR_SDADEL_SHIFT 16
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#define I2C_TIMINGR_SDADEL (0x0F << I2C_TIMINGR_SDADEL_SHIFT)
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#define I2C_TIMINGR_SDADEL_VAL(x) ((x) << I2C_TIMINGR_SDADEL_SHIFT)
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#define I2C_TIMINGR_SCLH_SHIFT 8
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#define I2C_TIMINGR_SCLH (0xFF << I2C_TIMINGR_SCLH_SHIFT)
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#define I2C_TIMINGR_SCLH_VAL(x) ((x) << I2C_TIMINGR_SCLH_SHIFT)
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#define I2C_TIMINGR_SCLL_SHIFT 0
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#define I2C_TIMINGR_SCLL (0xFF << I2C_TIMINGR_SCLL_SHIFT)
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#define I2C_TIMINGR_SCLL_VAL(x) ((x) << I2C_TIMINGR_SCLL_SHIFT)
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/* I2C_TIMEOUTR values ----------------------------------------------------- */
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#define I2C_TIMEOUTR_TETXEN (1 << 31)
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#define I2C_TIMEOUTR_TIMEOUTB_SHIFT 16
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#define I2C_TIMEOUTR_TIMEOUTB (0xFFF << I2C_TIMEOUTR_TIMEOUTB_SHIFT)
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#define I2C_TIMEOUTR_TIMEOUTB_VAL(x) ((x) << I2C_TIMEOUTR_TIMEOUTB_SHIFT)
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#define I2C_TIMEOUTR_TIMOUTEN (1 << 15)
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#define I2C_TIMEOUTR_TIDLE (1 << 12)
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#define I2C_TIMEOUTR_TIMEOUTA_SHIFT 0
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#define I2C_TIMEOUTR_TIMEOUTA (0xFFF << I2C_TIMEOUTR_TIMEOUTA_SHIFT)
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#define I2C_TIMEOUTR_TIMEOUTA_VAL(x) ((x) << I2C_TIMEOUTR_TIMEOUTA_SHIFT)
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/* I2C_ISR values ---------------------------------------------------------- */
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#define I2C_ISR_ADDCODE_SHIFT 17
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#define I2C_ISR_ADDCODE (0x7F << I2C_ISR_ADDCODE_SHIFT)
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#define I2C_ISR_ADDCODE_VAL(x) ((x) << I2C_ISR_ADDCODE_SHIFT)
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#define I2C_ISR_ADDCODE_VALG(reg) (((reg) & I2C_ISR_ADDCODE) >> \
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I2C_ISR_ADDCODE_SHIFT)
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#define I2C_ISR_DIR (1 << 16)
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#define I2C_ISR_BUSY (1 << 15)
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#define I2C_ISR_ALERT (1 << 13)
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#define I2C_ISR_TIMEOUT (1 << 12)
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#define I2C_ISR_PECERR (1 << 11)
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#define I2C_ISR_OVR (1 << 10)
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#define I2C_ISR_ARLO (1 << 9)
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#define I2C_ISR_BERR (1 << 8)
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#define I2C_ISR_TCR (1 << 7)
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#define I2C_ISR_TC (1 << 6)
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#define I2C_ISR_STOPF (1 << 5)
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#define I2C_ISR_NACKF (1 << 4)
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#define I2C_ISR_ADDR (1 << 3)
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#define I2C_ISR_RXNE (1 << 2)
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#define I2C_ISR_TXIS (1 << 1)
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#define I2C_ISR_TXE (1 << 0)
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/* I2C_ICR values ---------------------------------------------------------- */
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#define I2C_ICR_ALERTCF (1 << 13)
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#define I2C_ICR_TIMEOUTCF (1 << 12)
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#define I2C_ICR_PECCF (1 << 11)
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#define I2C_ICR_OVRCF (1 << 10)
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#define I2C_ICR_ARLOCF (1 << 9)
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#define I2C_ICR_BERRCF (1 << 8)
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#define I2C_ICR_STOPCF (1 << 5)
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#define I2C_ICR_NACKCF (1 << 4)
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#define I2C_ICR_ADDRCF (1 << 3)
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/*****************************************************************************/
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/* API definitions */
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/*****************************************************************************/
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/*****************************************************************************/
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/* API Functions */
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/*****************************************************************************/
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BEGIN_DECLS
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END_DECLS
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#include <libopencm3/stm32/common/i2c_common_v2.h>
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#endif
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