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stm32l4: rcc: use SYSCLK consistently with other families

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Signed-off-by: Karl Palsson <karlp@tweak.au>
This commit is contained in:
Karl Palsson
2023-02-02 23:54:50 +00:00
parent 0878a04696
commit e9426db222
2 changed files with 5 additions and 5 deletions
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8
include/libopencm3/stm32/l4/rcc.h
View File

@@ -621,7 +621,7 @@ Twelve frequency ranges are available: 100 kHz, 200 kHz, 400 kHz, 800 kHz,
#define RCC_CCIPR_ADCSEL_NONE 0 #define RCC_CCIPR_ADCSEL_NONE 0
#define RCC_CCIPR_ADCSEL_PLLSAI1R 1 #define RCC_CCIPR_ADCSEL_PLLSAI1R 1
#define RCC_CCIPR_ADCSEL_PLLSAI2R 2 #define RCC_CCIPR_ADCSEL_PLLSAI2R 2
#define RCC_CCIPR_ADCSEL_SYS 3 #define RCC_CCIPR_ADCSEL_SYSCLK 3
#define RCC_CCIPR_ADCSEL_MASK 0x3 #define RCC_CCIPR_ADCSEL_MASK 0x3
#define RCC_CCIPR_ADCSEL_SHIFT 28 #define RCC_CCIPR_ADCSEL_SHIFT 28
@@ -649,7 +649,7 @@ Twelve frequency ranges are available: 100 kHz, 200 kHz, 400 kHz, 800 kHz,
#define RCC_CCIPR_LPTIM1SEL_SHIFT 18 #define RCC_CCIPR_LPTIM1SEL_SHIFT 18
#define RCC_CCIPR_I2CxSEL_APB 0 #define RCC_CCIPR_I2CxSEL_APB 0
#define RCC_CCIPR_I2CxSEL_SYS 1 #define RCC_CCIPR_I2CxSEL_SYSCLK 1
#define RCC_CCIPR_I2CxSEL_HSI16 2 #define RCC_CCIPR_I2CxSEL_HSI16 2
#define RCC_CCIPR_I2CxSEL_MASK 0x3 #define RCC_CCIPR_I2CxSEL_MASK 0x3
#define RCC_CCIPR_I2C4SEL_SHIFT 0 #define RCC_CCIPR_I2C4SEL_SHIFT 0
@@ -665,12 +665,12 @@ Twelve frequency ranges are available: 100 kHz, 200 kHz, 400 kHz, 800 kHz,
#define RCC_CCIPR_LPUART1SEL_SHIFT 10 #define RCC_CCIPR_LPUART1SEL_SHIFT 10
#define RCC_CCIPR_USARTxSEL_APB 0 #define RCC_CCIPR_USARTxSEL_APB 0
#define RCC_CCIPR_USARTxSEL_SYS 1 #define RCC_CCIPR_USARTxSEL_SYSCLK 1
#define RCC_CCIPR_USARTxSEL_HSI16 2 #define RCC_CCIPR_USARTxSEL_HSI16 2
#define RCC_CCIPR_USARTxSEL_LSE 3 #define RCC_CCIPR_USARTxSEL_LSE 3
#define RCC_CCIPR_USARTxSEL_MASK 0x3 #define RCC_CCIPR_USARTxSEL_MASK 0x3
#define RCC_CCIPR_UARTxSEL_APB RCC_CCIPR_USARTxSEL_APB #define RCC_CCIPR_UARTxSEL_APB RCC_CCIPR_USARTxSEL_APB
#define RCC_CCIPR_UARTxSEL_SYS RCC_CCIPR_USARTxSEL_SYS #define RCC_CCIPR_UARTxSEL_SYSCLK RCC_CCIPR_USARTxSEL_SYSCLK
#define RCC_CCIPR_UARTxSEL_HSI16 RCC_CCIPR_USARTxSEL_HSI16 #define RCC_CCIPR_UARTxSEL_HSI16 RCC_CCIPR_USARTxSEL_HSI16
#define RCC_CCIPR_UARTxSEL_LSE RCC_CCIPR_USARTxSEL_LSE #define RCC_CCIPR_UARTxSEL_LSE RCC_CCIPR_USARTxSEL_LSE
#define RCC_CCIPR_UARTxSEL_MASK RCC_CCIPR_USARTxSEL_MASK #define RCC_CCIPR_UARTxSEL_MASK RCC_CCIPR_USARTxSEL_MASK

2
lib/stm32/l4/rcc.c
View File

@@ -541,7 +541,7 @@ static uint32_t rcc_uart_i2c_clksel_freq_hz(uint32_t apb_clk, uint8_t shift, uin
switch (clksel) { switch (clksel) {
case RCC_CCIPR_USARTxSEL_APB: case RCC_CCIPR_USARTxSEL_APB:
return apb_clk; return apb_clk;
case RCC_CCIPR_USARTxSEL_SYS: case RCC_CCIPR_USARTxSEL_SYSCLK:
return rcc_ahb_frequency * rcc_get_div_from_hpre(hpre); return rcc_ahb_frequency * rcc_get_div_from_hpre(hpre);
case RCC_CCIPR_USARTxSEL_HSI16: case RCC_CCIPR_USARTxSEL_HSI16:
return 16000000U; return 16000000U;