stm32l4: rcc: use SYSCLK consistently with other families
Signed-off-by: Karl Palsson <karlp@tweak.au>
This commit is contained in:
@@ -621,7 +621,7 @@ Twelve frequency ranges are available: 100 kHz, 200 kHz, 400 kHz, 800 kHz,
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#define RCC_CCIPR_ADCSEL_NONE 0
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#define RCC_CCIPR_ADCSEL_PLLSAI1R 1
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#define RCC_CCIPR_ADCSEL_PLLSAI2R 2
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#define RCC_CCIPR_ADCSEL_SYS 3
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#define RCC_CCIPR_ADCSEL_SYSCLK 3
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#define RCC_CCIPR_ADCSEL_MASK 0x3
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#define RCC_CCIPR_ADCSEL_SHIFT 28
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@@ -649,7 +649,7 @@ Twelve frequency ranges are available: 100 kHz, 200 kHz, 400 kHz, 800 kHz,
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#define RCC_CCIPR_LPTIM1SEL_SHIFT 18
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#define RCC_CCIPR_I2CxSEL_APB 0
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#define RCC_CCIPR_I2CxSEL_SYS 1
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#define RCC_CCIPR_I2CxSEL_SYSCLK 1
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#define RCC_CCIPR_I2CxSEL_HSI16 2
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#define RCC_CCIPR_I2CxSEL_MASK 0x3
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#define RCC_CCIPR_I2C4SEL_SHIFT 0
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@@ -665,12 +665,12 @@ Twelve frequency ranges are available: 100 kHz, 200 kHz, 400 kHz, 800 kHz,
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#define RCC_CCIPR_LPUART1SEL_SHIFT 10
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#define RCC_CCIPR_USARTxSEL_APB 0
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#define RCC_CCIPR_USARTxSEL_SYS 1
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#define RCC_CCIPR_USARTxSEL_SYSCLK 1
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#define RCC_CCIPR_USARTxSEL_HSI16 2
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#define RCC_CCIPR_USARTxSEL_LSE 3
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#define RCC_CCIPR_USARTxSEL_MASK 0x3
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#define RCC_CCIPR_UARTxSEL_APB RCC_CCIPR_USARTxSEL_APB
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#define RCC_CCIPR_UARTxSEL_SYS RCC_CCIPR_USARTxSEL_SYS
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#define RCC_CCIPR_UARTxSEL_SYSCLK RCC_CCIPR_USARTxSEL_SYSCLK
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#define RCC_CCIPR_UARTxSEL_HSI16 RCC_CCIPR_USARTxSEL_HSI16
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#define RCC_CCIPR_UARTxSEL_LSE RCC_CCIPR_USARTxSEL_LSE
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#define RCC_CCIPR_UARTxSEL_MASK RCC_CCIPR_USARTxSEL_MASK
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