additions to opencmsis to make the clock example run
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@@ -1,6 +1,9 @@
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#ifndef OPENCMSIS_CORECM3_H
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#define OPENCMSIS_CORECM3_H
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/* needed in various places where we rather should include libopencm3 functionality */
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#define MMIO32(addr) (*(volatile uint32_t *)(addr))
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/* the original core_cm3.h is nonfree by arm; this provides libopencm3 variant of the symbols efm32lib needs of CMSIS. */
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#include <stdint.h>
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@@ -62,9 +65,25 @@ typedef struct
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/* stubs for efm32_dma */
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#define NVIC_ClearPendingIRQ(irq) 1
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#define NVIC_EnableIRQ(irq) 1
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#define NVIC_DisableIRQ(irq) 1
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/* also used by the clock example. code taken from stm32's nvic.[hc], FIXME until
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* the generic cm3 functionality is moved out from stm32 and can be used here
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* easily (nvic_clear_pending_irq, nvic_enable_irq, nvic_disable_irq). */
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#define NVIC_BASE (SCS_BASE + 0x0100)
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#define NVIC_ISER(iser_id) MMIO32(NVIC_BASE + 0x00 + (iser_id * 4))
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#define NVIC_ICER(icer_id) MMIO32(NVIC_BASE + 0x80 + (icer_id * 4))
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#define NVIC_ICPR(icpr_id) MMIO32(NVIC_BASE + 0x180 + (icpr_id * 4))
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static inline void NVIC_ClearPendingIRQ(uint8_t irqn)
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{
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NVIC_ICPR(irqn / 32) = (1 << (irqn % 32));
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}
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static inline void NVIC_EnableIRQ(uint8_t irqn)
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{
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NVIC_ISER(irqn / 32) = (1 << (irqn % 32));
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}
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static inline void NVIC_DisableIRQ(uint8_t irqn)
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{
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NVIC_ICER(irqn / 32) = (1 << (irqn % 32));
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}
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/* stubs for efm32_int */
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@@ -110,7 +129,6 @@ typedef struct
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* and systick_set_clocksource).
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* */
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#define SYS_TICK_BASE (SCS_BASE + 0x0010)
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#define MMIO32(addr) (*(volatile uint32_t *)(addr))
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#define STK_LOAD MMIO32(SYS_TICK_BASE + 0x04)
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#define STK_CTRL MMIO32(SYS_TICK_BASE + 0x00)
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#define STK_CTRL_TICKINT (1 << 1)
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@@ -145,4 +163,9 @@ typedef struct
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* vector.c */
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#define SysTick_Handler sys_tick_handler
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/* likewise, clock.c defines GPIO_ODD_IRQHandler and GPIO_EVEN_IRQHandler */
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#define GPIO_ODD_IRQHandler gpio_odd_isr
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#define GPIO_EVEN_IRQHandler gpio_even_isr
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#define RTC_IRQHandler rtc_isr
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#endif
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