Added standard clock setup routines.
Thanks to Thomas Otto for pointing out problems with the clock code in examples and his clock routine implementations. Based on that the most common clock combination routines were added to the library and all routines in examples setting up the clock replaced with calls to that functions.
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@@ -21,33 +21,17 @@
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#include <libopenstm32/rcc.h>
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#include <libopenstm32/gpio.h>
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/* Set STM32 to 72 MHz. */
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void clock_setup(void)
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{
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/* Select HSI as SYSCLK source. */
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rcc_set_sysclk_source(SW_SYSCLKSEL_HSICLK);
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rcc_clock_setup_in_hse_8mhz_out_72mhz();
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/* Set the PLL multiplication factor to 9. */
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rcc_set_pll_multiplication_factor(PLLMUL_PLL_CLK_MUL9);
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/* Enable GPIOC clock. */
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rcc_peripheral_enable_clock(&RCC_APB2ENR, IOPCEN);
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/* Select HSI/2 as PLL source. */
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rcc_set_pll_source(PLLSRC_HSI_CLK_DIV2);
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rcc_set_pllxtpre(PLLXTPRE_HSE_CLK_DIV2);
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/* Enable PLL oscillator and wait for it to stabilize. */
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rcc_osc_on(PLL);
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rcc_wait_for_osc_ready(PLL);
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/* Select PLL as SYSCLK source. */
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rcc_set_sysclk_source(SW_SYSCLKSEL_PLLCLK);
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}
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void gpio_setup(void)
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{
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/* Enable GPIOC clock. */
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rcc_peripheral_enable_clock(&RCC_APB2ENR, IOPCEN);
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/* Set GPIO6 (in GPIO port C) to 'output push-pull'. */
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gpio_set_mode(GPIOC, GPIO_MODE_OUTPUT_50_MHZ,
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GPIO_CNF_OUTPUT_PUSHPULL, GPIO6 | GPIO7 | GPIO8 | GPIO9);
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@@ -236,26 +236,9 @@ static const u16 gamma_table_3_0[] = {
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};
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#endif
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/* Set STM32 to 72 MHz. */
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void clock_setup(void)
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{
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/* Select HSI as SYSCLK source. */
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rcc_set_sysclk_source(SW_SYSCLKSEL_HSICLK);
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/* Set the PLL multiplication factor to 9. */
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rcc_set_pll_multiplication_factor(PLLMUL_PLL_CLK_MUL9);
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/* Select HSI/2 as PLL source. */
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rcc_set_pll_source(PLLSRC_HSI_CLK_DIV2);
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rcc_set_pllxtpre(PLLXTPRE_HSE_CLK_DIV2);
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/* Enable PLL oscillator and wait for it to stabilize. */
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rcc_osc_on(PLL);
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rcc_wait_for_osc_ready(PLL);
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/* Select PLL as SYSCLK source. */
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rcc_set_sysclk_source(SW_SYSCLKSEL_PLLCLK);
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rcc_clock_setup_in_hse_8mhz_out_72mhz();
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/* Enable TIM3 clock. */
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rcc_peripheral_enable_clock(&RCC_APB1ENR, TIM3EN);
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@@ -23,30 +23,15 @@
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/* Set STM32 to 72 MHz. */
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void clock_setup(void)
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{
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/* Select HSI as SYSCLK source. */
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rcc_set_sysclk_source(SW_SYSCLKSEL_HSICLK);
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rcc_clock_setup_in_hse_8mhz_out_72mhz();
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/* Set the PLL multiplication factor to 9. */
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rcc_set_pll_multiplication_factor(PLLMUL_PLL_CLK_MUL9);
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/* Enable GPIOC clock. */
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rcc_peripheral_enable_clock(&RCC_APB2ENR, IOPCEN);
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/* Select HSI/2 as PLL source. */
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rcc_set_pll_source(PLLSRC_HSI_CLK_DIV2);
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rcc_set_pllxtpre(PLLXTPRE_HSE_CLK_DIV2);
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/* Enable PLL oscillator and wait for it to stabilize. */
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rcc_osc_on(PLL);
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rcc_wait_for_osc_ready(PLL);
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/* Select PLL as SYSCLK source. */
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rcc_set_sysclk_source(SW_SYSCLKSEL_PLLCLK);
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}
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void gpio_setup(void)
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{
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/* Enable GPIOC clock. */
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rcc_peripheral_enable_clock(&RCC_APB2ENR, IOPCEN);
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/* Set GPIO12 (in GPIO port C) to 'output push-pull'. */
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gpio_set_mode(GPIOC, GPIO_MODE_OUTPUT_50_MHZ,
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GPIO_CNF_OUTPUT_PUSHPULL, GPIO12);
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@@ -21,23 +21,7 @@
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void clock_setup(void)
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{
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/* Select HSI as SYSCLK source. */
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rcc_set_sysclk_source(SW_SYSCLKSEL_HSICLK);
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/* Set the PLL multiplication factor to 9. */
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rcc_set_pll_multiplication_factor(PLLMUL_PLL_CLK_MUL9);
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/* Select HSI/2 as PLL source. */
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rcc_set_pll_source(PLLSRC_HSI_CLK_DIV2);
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rcc_set_pllxtpre(PLLXTPRE_HSE_CLK_DIV2);
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/* Enable PLL oscillator and wait for it to stabilize. */
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rcc_osc_on(PLL);
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rcc_wait_for_osc_ready(PLL);
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/* Select PLL as SYSCLK source. */
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rcc_set_sysclk_source(SW_SYSCLKSEL_PLLCLK);
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rcc_clock_setup_in_hse_8mhz_out_72mhz();
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}
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void spi_setup(void)
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@@ -23,31 +23,18 @@
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void clock_setup(void)
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{
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/* Select HSI as SYSCLK source. */
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rcc_set_sysclk_source(SW_SYSCLKSEL_HSICLK);
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rcc_clock_setup_in_hse_8mhz_out_72mhz();
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/* Set the PLL multiplication factor to 9. */
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rcc_set_pll_multiplication_factor(PLLMUL_PLL_CLK_MUL9);
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/* Enable GPIOC clock. */
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rcc_peripheral_enable_clock(&RCC_APB2ENR, IOPCEN);
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/* Select HSI/2 as PLL source. */
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rcc_set_pll_source(PLLSRC_HSI_CLK_DIV2);
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rcc_set_pllxtpre(PLLXTPRE_HSE_CLK_DIV2);
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/* Enable PLL oscillator and wait for it to stabilize. */
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rcc_osc_on(PLL);
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rcc_wait_for_osc_ready(PLL);
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/* Select PLL as SYSCLK source. */
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rcc_set_sysclk_source(SW_SYSCLKSEL_PLLCLK);
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/* Enable clocks for GPIO port B (for GPIO_USART3_TX) and USART3. */
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rcc_peripheral_enable_clock(&RCC_APB2ENR, IOPBEN);
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rcc_peripheral_enable_clock(&RCC_APB1ENR, USART3EN);
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}
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void usart_setup(void)
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{
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/* Enable clocks for GPIO port B (for GPIO_USART3_TX) and USART3. */
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rcc_peripheral_enable_clock(&RCC_APB2ENR, IOPBEN);
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rcc_peripheral_enable_clock(&RCC_APB1ENR, USART3EN);
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/* Setup GPIO pin GPIO_USART3_TX/GPIO10 on GPIO port B for transmit. */
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gpio_set_mode(GPIOB, GPIO_MODE_OUTPUT_50_MHZ,
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GPIO_CNF_OUTPUT_ALTFN_PUSHPULL, GPIO_USART3_TX);
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@@ -66,9 +53,6 @@ void usart_setup(void)
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void gpio_setup(void)
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{
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/* Enable GPIOC clock. */
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rcc_peripheral_enable_clock(&RCC_APB2ENR, IOPCEN);
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/* Set GPIO12 (in GPIO port C) to 'output push-pull'. */
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gpio_set_mode(GPIOC, GPIO_MODE_OUTPUT_2_MHZ,
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GPIO_CNF_OUTPUT_PUSHPULL, GPIO12);
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