[stm32f4] Remove rcc typedefs added prefixes to clock related enums.
Let's not hide the fact that these variables are structs/enums. We are filling up the namespace badly enough, we should be prefixing as much as we can with the module names at least. As users we already run often enough in namespace colisions we don't have to make it worse. * CLOCK_3V3_xxx enums renamed to RCC_CLOCK_3V3_xxx * clock enums (PLL, HSI, HSE ...) prefixed with RCC_ * scale enum of pwr module prefixed with PWR_
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@@ -72,14 +72,14 @@ LGPL License Terms @ref lgpl_license
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/* --- Function prototypes ------------------------------------------------- */
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typedef enum {
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SCALE1,
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SCALE2,
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} vos_scale_t;
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enum pwr_vos_scale {
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PWR_SCALE1,
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PWR_SCALE2,
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};
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BEGIN_DECLS
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void pwr_set_vos_scale(vos_scale_t scale);
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void pwr_set_vos_scale(enum pwr_vos_scale scale);
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END_DECLS
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@@ -546,15 +546,15 @@ extern uint32_t rcc_apb2_frequency;
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/* --- Function prototypes ------------------------------------------------- */
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typedef enum {
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CLOCK_3V3_48MHZ,
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CLOCK_3V3_84MHZ,
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CLOCK_3V3_120MHZ,
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CLOCK_3V3_168MHZ,
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CLOCK_3V3_END
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} clock_3v3_t;
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enum rcc_clock_3v3 {
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RCC_CLOCK_3V3_48MHZ,
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RCC_CLOCK_3V3_84MHZ,
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RCC_CLOCK_3V3_120MHZ,
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RCC_CLOCK_3V3_168MHZ,
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RCC_CLOCK_3V3_END
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};
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typedef struct {
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struct rcc_clock_scale {
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uint8_t pllm;
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uint16_t plln;
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uint8_t pllp;
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@@ -566,15 +566,19 @@ typedef struct {
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uint8_t power_save;
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uint32_t apb1_frequency;
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uint32_t apb2_frequency;
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} clock_scale_t;
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};
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extern const clock_scale_t hse_8mhz_3v3[CLOCK_3V3_END];
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extern const clock_scale_t hse_12mhz_3v3[CLOCK_3V3_END];
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extern const clock_scale_t hse_16mhz_3v3[CLOCK_3V3_END];
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extern const clock_scale_t hse_25mhz_3v3[CLOCK_3V3_END];
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extern const struct rcc_clock_scale rcc_hse_8mhz_3v3[RCC_CLOCK_3V3_END];
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extern const struct rcc_clock_scale rcc_hse_12mhz_3v3[RCC_CLOCK_3V3_END];
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extern const struct rcc_clock_scale rcc_hse_16mhz_3v3[RCC_CLOCK_3V3_END];
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extern const struct rcc_clock_scale rcc_hse_25mhz_3v3[RCC_CLOCK_3V3_END];
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enum rcc_osc {
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PLL, HSE, HSI, LSE, LSI
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RCC_PLL,
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RCC_HSE,
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RCC_HSI,
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RCC_LSE,
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RCC_LSI
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};
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#define _REG_BIT(base, bit) (((base) << 5) + (bit))
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@@ -854,7 +858,7 @@ void rcc_set_main_pll_hsi(uint32_t pllm, uint32_t plln, uint32_t pllp,
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void rcc_set_main_pll_hse(uint32_t pllm, uint32_t plln, uint32_t pllp,
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uint32_t pllq);
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uint32_t rcc_system_clock_source(void);
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void rcc_clock_setup_hse_3v3(const clock_scale_t *clock);
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void rcc_clock_setup_hse_3v3(const struct rcc_clock_scale *clock);
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END_DECLS
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