stm32: rcc: add reset reason group flags.

Originally suggested in https://github.com/libopencm3/libopencm3/pull/399

At least provide macros for each family that allows easy masking of the
full set of reset reason flags.  Trying to provide a function that
provides these in random upper bits seems unclear at best.
This commit is contained in:
Karl Palsson
2017-03-26 21:47:45 +00:00
parent 904345eaf1
commit d1d511c6f4
8 changed files with 26 additions and 1 deletions

View File

@@ -678,6 +678,9 @@ Twelve frequency ranges are available: 100 kHz, 200 kHz, 400 kHz, 800 kHz,
#define RCC_CSR_OBLRSTF (1 << 25)
#define RCC_CSR_FWRSTF (1 << 24)
#define RCC_CSR_RMVF (1 << 23)
#define RCC_CSR_RESET_FLAGS (RCC_CSR_LPWRRSTF | RCC_CSR_WWDGRSTF |\
RCC_CSR_IWDGRSTF | RCC_CSR_SFTRSTF | RCC_CSR_BORRSTF |\
RCC_CSR_PINRSTF | RCC_CSR_OBLRSTF | RCC_CSR_FWRSTF)
/** @defgroup rcc_csr_msirange MSI Range after standby values
@brief Range of the MSI oscillator after returning from standby