sam:d: port: complete port (define, configuration and access)
This commit is contained in:
Gwenhael Goavec-Merou
committed by
Karl Palsson
Karl Palsson
parent
5b9b784b30
commit
d11680638b
@@ -1,7 +1,16 @@
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/** @defgroup gpio_defines
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*
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* #ingroup SAMD_defines
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*
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* @brief Defined Constants and Types for the SAMD Port controler
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*
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* LGPL License Terms @ref lgpl_license
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*/
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/*
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* This file is part of the libopencm3 project.
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*
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* Copyright (C) 2016 Karl Palsson <karlp@tweak.net.au>
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* Copyright (C) 2020 Gwenhael Goavec-Merou <gwenhael.goavec-merou@trabucayre.com>
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*
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* This library is free software: you can redistribute it and/or modify
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* it under the terms of the GNU Lesser General Public License as published by
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@@ -19,13 +28,72 @@
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#pragma once
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/**@{*/
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#include <libopencm3/cm3/common.h>
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#include <libopencm3/sam/d/memorymap.h>
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/* --- Convenience macros ------------------------------------------------ */
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#define PORTA (PORT_BASE + 0)
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#define PORTB (PORT_BASE + 0x80)
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/* GPIO number definitions (for convenience) */
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/** @defgroup gpio_pin_id GPIO Pin Identifiers
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@ingroup gpio_defines
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@{*/
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#define GPIO0 (1 << 0)
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#define GPIO1 (1 << 1)
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#define GPIO2 (1 << 2)
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#define GPIO3 (1 << 3)
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#define GPIO4 (1 << 4)
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#define GPIO5 (1 << 5)
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#define GPIO6 (1 << 6)
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#define GPIO7 (1 << 7)
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#define GPIO8 (1 << 8)
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#define GPIO9 (1 << 9)
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#define GPIO10 (1 << 10)
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#define GPIO11 (1 << 11)
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#define GPIO12 (1 << 12)
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#define GPIO13 (1 << 13)
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#define GPIO14 (1 << 14)
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#define GPIO15 (1 << 15)
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#define GPIO16 (1 << 16)
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#define GPIO17 (1 << 17)
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#define GPIO18 (1 << 18)
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#define GPIO19 (1 << 19)
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#define GPIO20 (1 << 20)
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#define GPIO21 (1 << 21)
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#define GPIO22 (1 << 22)
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#define GPIO23 (1 << 23)
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#define GPIO24 (1 << 24)
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#define GPIO25 (1 << 25)
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#define GPIO26 (1 << 26)
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#define GPIO27 (1 << 27)
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#define GPIO28 (1 << 28)
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#define GPIO29 (1 << 29)
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#define GPIO30 (1 << 30)
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#define GPIO31 (1 << 31)
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#define GPIO_ALL 0xffff
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/**@}*/
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/* GPIO mux definitions (for convenience) */
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/** @defgroup gpio_mux GPIO mux configuration
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@ingroup gpio_mux
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@{*/
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enum port_mux {
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PORT_PMUX_FUN_A = 0,
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PORT_PMUX_FUN_B,
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PORT_PMUX_FUN_C,
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PORT_PMUX_FUN_D,
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PORT_PMUX_FUN_E,
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PORT_PMUX_FUN_F,
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PORT_PMUX_FUN_G,
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PORT_PMUX_FUN_H,
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PORT_PMUX_FUN_I
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};
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/**@}*/
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/* --- PORT registers ----------------------------------------------------- */
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/* Direction register */
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@@ -66,3 +134,154 @@
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/* Pin configuration registers */
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#define PORT_PINCFG(port, n) MMIO8((port) + 0x0040 + (n))
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/* --- PORTx_DIR values ---------------------------------------------------- */
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/* PORTx_DIR[31:0]: DIRy[31:0]: Port x set bit y direction [y=0..31] */
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/* --- PORTx_DIRCLR values ------------------------------------------------- */
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/* PORTx_DIRCLR[31:0]: DIRCLRy[31:0]: Port x set bit y as input [y=0..31] */
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/* --- PORTx_DIRSET values ------------------------------------------------- */
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/* PORTx_DIRSET[31:0]: DIRSETy[31:0]: Port x set bit y as output [y=0..31] */
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/* --- PORTx_DIRTGL values ------------------------------------------------- */
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/* PORTx_DIRTGL[31:0]: DIRTGLy[31:0]: Port x toggle bit y direction [y=0..31] */
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/* --- PORTx_OUT values ---------------------------------------------------- */
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/* PORTx_OUT[31:0]: OUTy[31:0]: Port output data [y=0..31] */
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/* --- PORTx_OUTCLR values ------------------------------------------------- */
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/* PORTx_OUTCLR[31:0]: OUTCLRy[31:0]: Port x reset bit y [y=0..31] */
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/* --- PORTx_OUTSET values ------------------------------------------------- */
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/* PORTx_OUTSET[31:0]: OUTSETy[31:0]: Port x set bit y [y=0..31] */
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/* --- PORTx_OUTTGL values ------------------------------------------------- */
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/* PORTx_OUTTGL[31:0]: OUTTGLy[31:0]: Port x toggle bit y [y=0..31] */
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/* --- PORTx_IN values ----------------------------------------------------- */
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/* PORTx_IN[31:0]: INy[31:0]: Port input data [y=0..31] */
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/* --- PORTx_CTRL values --------------------------------------------------- */
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/* PORTx_CTRL[31:0]: CTRLy[31:0]: Port input sampling mode [y=0..31] */
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/* --- PORTx_WRCONFIG values ----------------------------------------------- */
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/* HWSEL: Half word select: 0 [15:0], 1 [31:16] */
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#define PORT_WRCONFIG_HWSEL (1 << 31)
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/* WRPINCFG: Write PINCFG: 1 to update pins for selected by PINMASK */
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#define PORT_WRCONFIG_WRPINCFG (1 << 30)
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/* Bit 29: Reserved */
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/* WRPMUX: Write PMUX: 1 to update pins pmux for selected by PINMASK */
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#define PORT_WRCONFIG_WRPMUX (1 << 28)
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/* PMUX: Peripheral Multiplexing: determine pmux for pins selected by PINMASK */
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#define PORT_WRCONFIG_PMUX(mux) ((0xf & (mux)) << 24)
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/* Bit 23: Reserved */
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/* DRVSTR: Output Driver Strength Selection: determine strength for pins in PINMASK */
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#define PORT_WRCONFIG_DRVSTR (1 << 22)
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/* Bit [21:19]: Reserved */
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/* PULLEN: Pull Enable: enable PINCFGy.PULLEN for pins in PINMASK */
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#define PORT_WRCONFIG_PULLEN (1 << 18)
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/* INEN: Input Enable: enable PINCFGy.INEN for pins in PINMASK */
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#define PORT_WRCONFIG_INEN (1 << 17)
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/* PMUXEN: Peripheral Multiplexer Enable: enable PINCFGy.PMUXEN for pins in PINMASK */
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#define PORT_WRCONFIG_PMUXEN (1 << 16)
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/* PINMASK: Pin Mask for Multiple Pin Configuration: select pins to be configured
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* [31:16] if HWSET=1, [15:0] if HWSET=0
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*/
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#define PORT_WRCONFIG_PINMASK(pins) ((0xffff & (pins)) << 0)
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/* --- PORTx_PMUX values --------------------------------------------------- */
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/* PMUXO: Peripheral Multiplexing for Odd-Numbered Pin: 2*x+1 pin multiplexing */
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#define PORT_PMUX_PMUXO(mux) ((0xf & (mux)) << 4)
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/* PMUXE: Peripheral Multiplexing for Even-Numbered Pin: 2*x pin multiplexing */
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#define PORT_PMUX_PMUXE(mux) ((0xf & (mux)) << 0)
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/* --- PORTx_PINCFGy values ------------------------------------------------ */
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/* Bit 7: Reserved */
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/* DRVSTR: Output Driver Strength Selection */
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#define PORT_PINCFG_DRVSTR (1 << 6)
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/* Bit [5:3]: Reserved */
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/* PULLEN: Pull Enable */
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#define PORT_PINCFG_PULLEN (1 << 2)
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/* INEN: Input Enable */
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#define PORT_PINCFG_INEN (1 << 1)
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/* PMUXEN: Peripheral Multiplexer Enable */
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#define PORT_PINCFG_PMUXEN (1 << 0)
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/* --- Convenience enums --------------------------------------------------- */
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/* GPIO mode definitions (for convenience) */
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/** @defgroup gpio_direction GPIO Pin direction
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@ingroup gpio_defines
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@li Input
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@li Output
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@li InOut
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@{*/
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#define GPIO_MODE_INPUT 0x00
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#define GPIO_MODE_OUTPUT 0x01
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#define GPIO_MODE_INOUT 0x02
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/**@}*/
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/** @defgroup gpio_cnf GPIO mode configuration
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@ingroup gpio_defines
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@li Float
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@li PullDown
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@li PullUp
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@li Alternate Function
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@{*/
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#define GPIO_CNF_FLOAT 0x00
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#define GPIO_CNF_PULLDOWN 0x01
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#define GPIO_CNF_PULLUP 0x02
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#define GPIO_CNF_AF 0x03
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/**@}*/
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/* --- Function prototypes ------------------------------------------------- */
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BEGIN_DECLS
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void gpio_mode_setup(uint32_t gpioport, uint8_t mode, uint8_t cnf, uint32_t gpios);
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void gpio_set_af(uint32_t gpioport, uint8_t af, uint32_t gpios);
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/** @ingroup gpio_control
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* @{ */
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void gpio_set(uint32_t gpioport, uint32_t gpios);
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void gpio_clear(uint32_t gpioport, uint32_t gpios);
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uint32_t gpio_get(uint32_t gpioport, uint32_t gpios);
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void gpio_toggle(uint32_t gpioport, uint32_t gpios);
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uint32_t port_read(uint32_t port);
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void port_write(uint32_t port, uint32_t data);
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END_DECLS
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/**@}*/
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