From ce9dab2a92144b3793f0eefcc017a16d9446fb4f Mon Sep 17 00:00:00 2001 From: Karl Palsson Date: Sun, 18 Oct 2015 23:41:49 +0000 Subject: [PATCH] stm32f3: rcc: drop unused "power_save" parameter Badly copied from F4 rcc code, there's no power save support in the f3 rcc tree. --- lib/stm32/f3/rcc.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/lib/stm32/f3/rcc.c b/lib/stm32/f3/rcc.c index e7fc97b1..69d9fb6d 100644 --- a/lib/stm32/f3/rcc.c +++ b/lib/stm32/f3/rcc.c @@ -51,7 +51,6 @@ const clock_scale_t hsi_8mhz[CLOCK_END] = { .hpre = RCC_CFGR_HPRE_DIV_NONE, .ppre1 = RCC_CFGR_PPRE1_DIV_2, .ppre2 = RCC_CFGR_PPRE2_DIV_NONE, - .power_save = 1, .flash_config = FLASH_ACR_PRFTBE | FLASH_ACR_LATENCY_1WS, .apb1_frequency = 22000000, .apb2_frequency = 44000000, @@ -62,7 +61,6 @@ const clock_scale_t hsi_8mhz[CLOCK_END] = { .hpre = RCC_CFGR_HPRE_DIV_NONE, .ppre1 = RCC_CFGR_PPRE1_DIV_2, .ppre2 = RCC_CFGR_PPRE2_DIV_NONE, - .power_save = 1, .flash_config = FLASH_ACR_PRFTBE | FLASH_ACR_LATENCY_1WS, .apb1_frequency = 24000000, .apb2_frequency = 48000000, @@ -73,7 +71,6 @@ const clock_scale_t hsi_8mhz[CLOCK_END] = { .hpre = RCC_CFGR_HPRE_DIV_NONE, .ppre1 = RCC_CFGR_PPRE1_DIV_2, .ppre2 = RCC_CFGR_PPRE2_DIV_NONE, - .power_save = 1, .flash_config = FLASH_ACR_PRFTBE | FLASH_ACR_LATENCY_2WS, .apb1_frequency = 32000000, .apb2_frequency = 64000000,