Split sam3x/sam3n support.

This commit is contained in:
Gareth McMullin
2013-05-19 19:08:42 +12:00
committed by Piotr Esden-Tempski
parent 4535a4c9b6
commit ce3e3dc39b
24 changed files with 295 additions and 36 deletions

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@@ -24,7 +24,9 @@
# include <libopencm3/lpc43xx/nvic.h>
#elif defined(SAM3X)
# include <libopencm3/sam3x/nvic.h>
# include <libopencm3/sam/3x/nvic.h>
#elif defined(SAM3N)
# include <libopencm3/sam/3n/nvic.h>
#elif defined(LM3S) || defined(LM4F)
/* Yes, we use the same interrupt table for both LM3S and LM4F */

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@@ -0,0 +1,36 @@
includeguard: LIBOPENCM3_SAM3N_NVIC_H
partname_humanreadable: Atmel SAM3N series
partname_doxygen: SAM3N
irqs:
- supc
- rstc
- rtc
- rtt
- wdg
- pmc
- eefc0
- reserved0
- uart0
- uart1
- reserved1
- pioa
- piob
- pioc
- usart0
- usart1
- reserved2
- reserved3
- reserved4
- twi0
- twi1
- spi
- reserved5
- tc0
- tc1
- tc2
- tc3
- tc4
- tc5
- adc
- dacc
- pwm

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@@ -0,0 +1,60 @@
/*
* This file is part of the libopencm3 project.
*
* Copyright (C) 2012 Gareth McMullin <gareth@blacksphere.co.nz>
*
* This library is free software: you can redistribute it and/or modify
* it under the terms of the GNU Lesser General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU Lesser General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public License
* along with this library. If not, see <http://www.gnu.org/licenses/>.
*/
#ifndef SAM3N_MEMORYMAP_H
#define SAM3N_MEMORYMAP_H
#include <libopencm3/cm3/common.h>
/* --- SAM3N peripheral space -------------------------------------------- */
#define SPI_BASE (0x40008000)
#define TC0_BASE (0x40010000)
#define TC1_BASE (0x40010040)
#define TC2_BASE (0x40010080)
#define TC3_BASE (0x40014000)
#define TC4_BASE (0x40014040)
#define TC5_BASE (0x40014080)
#define TWI0_BASE (0x40018000)
#define TWI1_BASE (0x4001C000)
#define PWM_BASE (0x40020000)
#define USART0_BASE (0x40024000)
#define USART1_BASE (0x40028000)
#define ADC_BASE (0x40038000)
#define DACC_BASE (0x4003C000)
/* --- SAM3N system controller space ------------------------------------- */
#define SMC_BASE (0x400E0000)
#define MATRIX_BASE (0x400E0200)
#define PMC_BASE (0x400E0400)
#define UART0_BASE (0x400E0600)
#define CHIPID_BASE (0x400E0740)
#define UART1_BASE (0x400E0800)
#define EEFC_BASE (0x400E0A00)
#define PIOA_BASE (0x400E0E00)
#define PIOB_BASE (0x400E1000)
#define PIOC_BASE (0x400E1200)
#define RSTC_BASE (0x400E1400)
#define SUPC_BASE (0x400E1410)
#define RTT_BASE (0x400E1430)
#define WDT_BASE (0x400E1450)
#define RTC_BASE (0x400E1460)
#define GPBR_BASE (0x400E1490)
#endif

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@@ -21,9 +21,10 @@
#define SAM3X_EEFC_H
#include <libopencm3/cm3/common.h>
#include <libopencm3/sam3x/memorymap.h>
#include <libopencm3/sam/memorymap.h>
/* --- Convenience macros ------------------------------------------------ */
#define EEFC EEFC_BASE
#define EEFC0 EEFC0_BASE
#define EEFC1 EEFC1_BASE
@@ -70,8 +71,12 @@
static inline void eefc_set_latency(u8 wait)
{
#if defined(SAM3X)
EEFC_FMR(EEFC0) = (EEFC_FMR(EEFC0) & ~EEFC_FMR_FWS_MASK) | (wait << 8);
EEFC_FMR(EEFC1) = (EEFC_FMR(EEFC1) & ~EEFC_FMR_FWS_MASK) | (wait << 8);
#elif defined(SAM3N)
EEFC_FMR(EEFC) = (EEFC_FMR(EEFC) & ~EEFC_FMR_FWS_MASK) | (wait << 8);
#endif
}
#endif

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@@ -20,7 +20,7 @@
#ifndef SAM3X_GPIO_H
#define SAM3X_GPIO_H
#include <libopencm3/sam3x/pio.h>
#include <libopencm3/sam/pio.h>
/* flags may be or'd together, but only contain one of
* GPOUTPUT, PERIPHA and PERIPHB */

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@@ -0,0 +1,32 @@
/*
* This file is part of the libopencm3 project.
*
* Copyright (C) 2013 Gareth McMullin <gareth@blacksphere.co.nz>
*
* This library is free software: you can redistribute it and/or modify
* it under the terms of the GNU Lesser General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU Lesser General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public License
* along with this library. If not, see <http://www.gnu.org/licenses/>.
*/
#ifndef SAM_MEMORYMAP_H
#define SAM_MEMORYMAP_H
#if defined(SAM3X)
# include <libopencm3/sam/3x/memorymap.h>
#elif defined(SAM3N)
# include <libopencm3/sam/3n/memorymap.h>
#else
# error "Processor family not defined."
#endif
#endif

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@@ -17,11 +17,11 @@
* along with this library. If not, see <http://www.gnu.org/licenses/>.
*/
#ifndef SAM3X_PIO_H
#define SAM3X_PIO_H
#ifndef SAM_PIO_H
#define SAM_PIO_H
#include <libopencm3/cm3/common.h>
#include <libopencm3/sam3x/memorymap.h>
#include <libopencm3/sam/memorymap.h>
/* --- Convenience macros ------------------------------------------------ */

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@@ -21,7 +21,7 @@
#define SAM3X_PMC_H
#include <libopencm3/cm3/common.h>
#include <libopencm3/sam3x/memorymap.h>
#include <libopencm3/sam/memorymap.h>
/* --- Power Management Controller (PMC) registers ----------------------- */

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@@ -21,7 +21,7 @@
#define SAM3X_PWM_H
#include <libopencm3/cm3/common.h>
#include <libopencm3/sam3x/memorymap.h>
#include <libopencm3/sam/memorymap.h>
/* --- Pulse Width Modulation (PWM) registers ----------------------- */
@@ -71,12 +71,20 @@
/* 0x01B0:0x01FC - Reserved */
#define PWM_CMR(x) MMIO32(PWM_BASE + 0x0200 + 0x20*(x))
#define PWM_CDTY(x) MMIO32(PWM_BASE + 0x0204 + 0x20*(x))
#define PWM_CDTYUPD(x) MMIO32(PWM_BASE + 0x0208 + 0x20*(x))
#define PWM_CPRD(x) MMIO32(PWM_BASE + 0x020C + 0x20*(x))
#define PWM_CPRDUPD(x) MMIO32(PWM_BASE + 0x0210 + 0x20*(x))
#define PWM_CCNT(x) MMIO32(PWM_BASE + 0x0214 + 0x20*(x))
#define PWM_DT(x) MMIO32(PWM_BASE + 0x0218 + 0x20*(x))
#define PWM_DTUPD(x) MMIO32(PWM_BASE + 0x021C + 0x20*(x))
#if defined(SAM3X)
# define PWM_CDTYUPD(x) MMIO32(PWM_BASE + 0x0208 + 0x20*(x))
# define PWM_CPRD(x) MMIO32(PWM_BASE + 0x020C + 0x20*(x))
# define PWM_CPRDUPD(x) MMIO32(PWM_BASE + 0x0210 + 0x20*(x))
# define PWM_CCNT(x) MMIO32(PWM_BASE + 0x0214 + 0x20*(x))
# define PWM_DT(x) MMIO32(PWM_BASE + 0x0218 + 0x20*(x))
# define PWM_DTUPD(x) MMIO32(PWM_BASE + 0x021C + 0x20*(x))
#elif defined(SAM3N)
# define PWM_CPRD(x) MMIO32(PWM_BASE + 0x0208 + 0x20*(x))
# define PWM_CCNT(x) MMIO32(PWM_BASE + 0x020C + 0x20*(x))
# define PWM_CUPD(x) MMIO32(PWM_BASE + 0x0210 + 0x20*(x))
#else
# error "Processor family not defined."
#endif
static inline void pwm_set_period(int ch, u32 period)
{

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@@ -21,7 +21,7 @@
#define SAM3X_TC_H
#include <libopencm3/cm3/common.h>
#include <libopencm3/sam3x/memorymap.h>
#include <libopencm3/sam/memorymap.h>
/* --- Timer Counter (TC) registers -------------------------------------- */

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@@ -21,7 +21,7 @@
#define SAM3X_UART_H
#include <libopencm3/cm3/common.h>
#include <libopencm3/sam3x/memorymap.h>
#include <libopencm3/sam/memorymap.h>
/* --- Universal Asynchronous Receiver Transmitter (UART) registers ------- */
#define UART_CR MMIO32(UART_BASE + 0x0000)

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@@ -21,7 +21,7 @@
#define SAM3X_USART_H
#include <libopencm3/cm3/common.h>
#include <libopencm3/sam3x/memorymap.h>
#include <libopencm3/sam/memorymap.h>
#define USART0 USART0_BASE
#define USART1 USART1_BASE

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@@ -21,7 +21,7 @@
#define SAM3X_WDT_H
#include <libopencm3/cm3/common.h>
#include <libopencm3/sam3x/memorymap.h>
#include <libopencm3/sam/memorymap.h>
/* --- WDT registers ----------------------------------------------------- */