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stm32f4: power: update rcc_clock_scale enum

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- Change .power_save to .voltage_scale, a pwr_vos_scale enum
- Enable pwr clock before setting VOS scale
- Fix flash wait states
- Make flash_set_ws more robust
This commit is contained in:
Jordi Pakey-Rodriguez
2018-07-07 00:20:58 -07:00
committed by Karl Palsson
parent e076c3cadd
commit cc8c8a2f83
6 changed files with 52 additions and 36 deletions
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3
include/libopencm3/stm32/common/flash_common_f234.h
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@@ -50,7 +50,8 @@
/* --- FLASH_ACR values ---------------------------------------------------- */
#define FLASH_ACR_LATENCY_MASK 0x07
#define FLASH_ACR_LATENCY_MASK 0x0f
#define FLASH_ACR_LATENCY(w) ((w) & FLASH_ACR_LATENCY_MASK)
#define FLASH_ACR_LATENCY_0WS 0x00
#define FLASH_ACR_LATENCY_1WS 0x01
#define FLASH_ACR_LATENCY_2WS 0x02

10
include/libopencm3/stm32/f4/pwr.h
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@@ -43,10 +43,11 @@ LGPL License Terms @ref lgpl_license
/* --- PWR_CR values ------------------------------------------------------- */
/* Bits [31:15]: Reserved */
/* Bits [31:16]: Reserved */
/* VOS: Regulator voltage scaling output selection */
#define PWR_CR_VOS (1 << 14)
#define PWR_CR_VOS_SHIFT 14
#define PWR_CR_VOS_MASK 0x3
/* Bits [13:10]: Reserved */
@@ -73,8 +74,9 @@ LGPL License Terms @ref lgpl_license
/* --- Function prototypes ------------------------------------------------- */
enum pwr_vos_scale {
PWR_SCALE1,
PWR_SCALE2,
PWR_SCALE1 = 0x3,
PWR_SCALE2 = 0x2,
PWR_SCALE3 = 0x1,
};
BEGIN_DECLS

4
include/libopencm3/stm32/f4/rcc.h
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@@ -45,6 +45,8 @@
#ifndef LIBOPENCM3_RCC_H
#define LIBOPENCM3_RCC_H
#include <libopencm3/stm32/pwr.h>
/** @defgroup rcc_registers RCC Registers
* @ingroup rcc_defines
* @brief Reset / Clock Control Registers
@@ -781,7 +783,7 @@ struct rcc_clock_scale {
uint8_t hpre;
uint8_t ppre1;
uint8_t ppre2;
uint8_t power_save;
enum pwr_vos_scale voltage_scale;
uint32_t ahb_frequency;
uint32_t apb1_frequency;
uint32_t apb2_frequency;