stm32f4: rcc: support hsi pll source
This commit is contained in:
committed by
Karl Palsson
parent
eed780e2c1
commit
ca6dcfbea1
@@ -185,6 +185,10 @@
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#define RCC_CFGR_MCOPRE_DIV_4 0x6
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#define RCC_CFGR_MCOPRE_DIV_5 0x7
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/* PLLSRC: PLL entry clock source */
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#define RCC_CFGR_PLLSRC_HSI_CLK 0x0
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#define RCC_CFGR_PLLSRC_HSE_CLK 0x1
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/* I2SSRC: I2S clock selection */
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#define RCC_CFGR_I2SSRC (1 << 23)
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@@ -780,6 +784,7 @@ struct rcc_clock_scale {
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uint8_t pllp;
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uint8_t pllq;
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uint8_t pllr;
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uint8_t pll_source;
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uint32_t flash_config;
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uint8_t hpre;
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uint8_t ppre1;
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@@ -1095,6 +1100,7 @@ void rcc_set_main_pll_hsi(uint32_t pllm, uint32_t plln, uint32_t pllp,
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void rcc_set_main_pll_hse(uint32_t pllm, uint32_t plln, uint32_t pllp,
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uint32_t pllq, uint32_t pllr);
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uint32_t rcc_system_clock_source(void);
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void rcc_clock_setup_pll(const struct rcc_clock_scale *clock);
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void rcc_clock_setup_hse_3v3(const struct rcc_clock_scale *clock);
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END_DECLS
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