EMTime/libopencm3
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style: fix some of the easier style bugs

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No real changes.
This commit is contained in:
Karl Palsson
2017-01-12 21:22:58 +00:00
parent 4af374f7c4
commit c9c5cb7c9c
30 changed files with 107 additions and 102 deletions
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3
lib/stm32/l4/adc.c
View File

@@ -55,4 +55,5 @@ void adc_disable_regulator(uint32_t adc)
ADC_CR(adc) &= ~ADC_CR_ADVREGEN;
}
/**@}*/
/**@}*/

5
lib/stm32/l4/flash.c
View File

@@ -246,7 +246,7 @@ void flash_lock_option_bytes(void)
* This performs all operations necessary to program a 32 bit word to FLASH
* memory. The program error flag should be checked separately for the event
* that memory was not properly erased.
*
*
* @param[in] address Starting address in Flash.
* @param[in] data word to write
*/
@@ -340,4 +340,5 @@ void flash_program_option_bytes(uint32_t data)
FLASH_OPTR |= FLASH_CR_OPTSTRT;
flash_wait_for_last_operation();
}
/**@}*/
/**@}*/

14
lib/stm32/l4/rcc.c
View File

@@ -155,17 +155,17 @@ bool rcc_is_osc_ready(enum rcc_osc osc)
{
switch (osc) {
case RCC_PLL:
return (RCC_CR & RCC_CR_PLLRDY);
return RCC_CR & RCC_CR_PLLRDY;
case RCC_HSE:
return (RCC_CR & RCC_CR_HSERDY);
return RCC_CR & RCC_CR_HSERDY;
case RCC_HSI16:
return (RCC_CR & RCC_CR_HSIRDY);
return RCC_CR & RCC_CR_HSIRDY;
case RCC_MSI:
return (RCC_CR & RCC_CR_MSIRDY);
return RCC_CR & RCC_CR_MSIRDY;
case RCC_LSE:
return (RCC_BDCR & RCC_BDCR_LSERDY);
return RCC_BDCR & RCC_BDCR_LSERDY;
case RCC_LSI:
return (RCC_CSR & RCC_CSR_LSIRDY);
return RCC_CSR & RCC_CSR_LSIRDY;
}
return false;
}
@@ -353,7 +353,7 @@ void rcc_set_main_pll(uint32_t source, uint32_t pllm, uint32_t plln, uint32_t pl
uint32_t rcc_system_clock_source(void)
{
/* Return the clock source which is used as system clock. */
return ((RCC_CFGR >> RCC_CFGR_SWS_SHIFT) & RCC_CFGR_SWS_MASK);
return (RCC_CFGR >> RCC_CFGR_SWS_SHIFT) & RCC_CFGR_SWS_MASK;
}
/**