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style: fix some of the easier style bugs

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No real changes.
This commit is contained in:
Karl Palsson
2017-01-12 21:22:58 +00:00
parent 4af374f7c4
commit c9c5cb7c9c
30 changed files with 107 additions and 102 deletions
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8
lib/stm32/common/adc_common_v2.c
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@@ -82,7 +82,7 @@ void adc_power_on_async(uint32_t adc)
*/
bool adc_is_power_on(uint32_t adc)
{
return (ADC_ISR(adc) & ADC_ISR_ADRDY);
return ADC_ISR(adc) & ADC_ISR_ADRDY;
}
/**
@@ -112,7 +112,7 @@ void adc_power_off_async(uint32_t adc)
uint32_t checks = ADC_CR_ADSTART;
uint32_t stops = ADC_CR_ADSTP;
#if defined (ADC_CR_JADSTART)
#if defined(ADC_CR_JADSTART)
checks |= ADC_CR_JADSTART;
stops |= ADC_CR_JADSTP;
#endif
@@ -130,7 +130,7 @@ void adc_power_off_async(uint32_t adc)
*/
bool adc_is_power_off(uint32_t adc)
{
return (!(ADC_CR(adc) & ADC_CR_ADEN));
return !(ADC_CR(adc) & ADC_CR_ADEN);
}
/**
@@ -164,7 +164,7 @@ void adc_calibrate_async(uint32_t adc)
*/
bool adc_is_calibrating(uint32_t adc)
{
return (ADC_CR(adc) & ADC_CR_ADCAL);
return ADC_CR(adc) & ADC_CR_ADCAL;
}
/**

3
lib/stm32/common/adc_common_v2_multi.c
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@@ -128,4 +128,5 @@ void adc_set_regular_sequence(uint32_t adc, uint8_t length, uint8_t channel[])
ADC_SQR4(adc) = reg32_4;
}
/**@}*/
/**@}*/

3
lib/stm32/common/pwr_common_l01.c
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@@ -44,4 +44,5 @@ void pwr_set_vos_scale(enum pwr_vos_scale scale)
PWR_CR = reg;
}
/**@}*/
/**@}*/

4
lib/stm32/common/usart_common_v2.c
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@@ -30,8 +30,8 @@
/*---------------------------------------------------------------------------*/
/** @brief USART enable data inversion
Logical data from the data register are send/received in negative/inverse logic.
(1=L, 0=H). The parity bit is also inverted.
Logical data from the data register are send/received in negative/inverse
logic. (1=L, 0=H). The parity bit is also inverted.
@note This bit field can only be written when the USART is disabled.