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stm32: rework spi, based on PR #740 and #742.

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split spi stuff in three part:
 - v1 : basic spi peripheral
 - v1_frf : v1 spi with frf mode additional bit in spi_cr2 / spi_sr
 - v2 : spi with variable datasize, fifo and other fancy stuff.

v1 maps to f1 chips
v1_frf to f2, f4 and l0,l1
v2 to f0, f3 and l4

This breaks spi_master_init API for v2 devices : function prototype from
common spi header used to be abused, with DFF bit reused for CRCL bit.
New v2 spi_master_init does not handle anymore CRCL bits, as it does not
usually mess with other crc configuration.
This commit is contained in:
Guillaume Revaillot
2018-04-04 16:27:59 +02:00
committed by Karl Palsson
parent 0deb58c73c
commit bf125e91f9
24 changed files with 205 additions and 83 deletions
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2
lib/stm32/l4/Makefile
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@@ -54,7 +54,7 @@ OBJS += usart_common_all.o usart_common_v2.o
OBJS += dma_common_l1f013.o
OBJS += iwdg_common_all.o
OBJS += rtc_common_l1f024.o
OBJS += spi_common_all.o spi_common_f03.o
OBJS += spi_common_all.o spi_common_v2.o
OBJS += usb.o usb_control.o usb_standard.o
OBJS += st_usbfs_core.o st_usbfs_v2.o