split spi stuff in three part: - v1 : basic spi peripheral - v1_frf : v1 spi with frf mode additional bit in spi_cr2 / spi_sr - v2 : spi with variable datasize, fifo and other fancy stuff. v1 maps to f1 chips v1_frf to f2, f4 and l0,l1 v2 to f0, f3 and l4 This breaks spi_master_init API for v2 devices : function prototype from common spi header used to be abused, with DFF bit reused for CRCL bit. New v2 spi_master_init does not handle anymore CRCL bits, as it does not usually mess with other crc configuration.
This commit is contained in:
committed by
Karl Palsson
parent
0deb58c73c
commit
bf125e91f9
@@ -40,12 +40,13 @@ OBJS = gpio.o rcc.o desig.o
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OBJS += crc_common_all.o dac_common_all.o dma_common_f24.o \
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gpio_common_all.o gpio_common_f0234.o i2c_common_v1.o \
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iwdg_common_all.o rtc_common_l1f024.o spi_common_all.o \
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spi_common_l1f124.o timer_common_all.o timer_common_f0234.o \
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iwdg_common_all.o rtc_common_l1f024.o \
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timer_common_all.o timer_common_f0234.o \
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timer_common_f24.o usart_common_all.o usart_common_f124.o \
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flash_common_f234.o flash_common_f24.o hash_common_f24.o \
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crypto_common_f24.o exti_common_all.o rcc_common_all.o
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OBJS += rng_common_v1.o
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OBJS += spi_common_all.o spi_common_v1.o spi_common_v1_frf.o
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OBJS += usb.o usb_standard.o usb_control.o usb_dwc_common.o \
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usb_f107.o usb_f207.o usb_msc.o
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