stm32: rework spi, based on PR #740 and #742.

split spi stuff in three part:
 - v1 : basic spi peripheral
 - v1_frf : v1 spi with frf mode additional bit in spi_cr2 / spi_sr
 - v2 : spi with variable datasize, fifo and other fancy stuff.

v1 maps to f1 chips
v1_frf to f2, f4 and l0,l1
v2 to f0, f3 and l4

This breaks spi_master_init API for v2 devices : function prototype from
common spi header used to be abused, with DFF bit reused for CRCL bit.
New v2 spi_master_init does not handle anymore CRCL bits, as it does not
usually mess with other crc configuration.

lib/stm32/f0/Makefile

@@ -41,13 +41,15 @@ OBJS		= can.o flash.o rcc.o usart.o dma.o rtc.o comparator.o crc.o \
 
 OBJS            += gpio_common_all.o gpio_common_f0234.o crc_common_all.o crc_v2.o \
                    pwr_common_v1.o iwdg_common_all.o rtc_common_l1f024.o \
-                   dma_common_l1f013.o exti_common_all.o spi_common_all.o \
-		   spi_common_f03.o flash_common_f01.o dac_common_all.o \
-		   timer_common_all.o timer_common_f0234.o rcc_common_all.o
+                   dma_common_l1f013.o exti_common_all.o \
+                   flash_common_f01.o dac_common_all.o \
+                   timer_common_all.o timer_common_f0234.o rcc_common_all.o
+
 OBJS		+= adc_common_v2.o
 OBJS		+= crs_common_all.o
 OBJS		+= usart_common_all.o usart_common_v2.o
 OBJS		+= i2c_common_v2.o
+OBJS		+= spi_common_all.o spi_common_v2.o
 
 OBJS		+= usb.o usb_control.o usb_standard.o
 OBJS		+= st_usbfs_core.o st_usbfs_v2.o