EMTime/libopencm3
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[Style] Stylefix sweep over the whole codebase.

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This commit is contained in:
Piotr Esden-Tempski
2015-12-14 22:57:15 +01:00
parent 1f6fd11dd9
commit b1049f9a6f
39 changed files with 445 additions and 359 deletions
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39
lib/stm32/f1/flash.c
View File

@@ -128,8 +128,9 @@ void flash_lock_upper(void)
void flash_clear_pgerr_flag_upper(void)
{
if (MEMORY_SIZE_REG > 512)
if (MEMORY_SIZE_REG > 512) {
FLASH_SR2 |= FLASH_SR_PGERR;
}
}
/*---------------------------------------------------------------------------*/
@@ -139,8 +140,9 @@ void flash_clear_pgerr_flag_upper(void)
void flash_clear_eop_flag_upper(void)
{
if (MEMORY_SIZE_REG > 512)
if (MEMORY_SIZE_REG > 512) {
FLASH_SR2 |= FLASH_SR_EOP;
}
}
/*---------------------------------------------------------------------------*/
@@ -150,8 +152,9 @@ void flash_clear_eop_flag_upper(void)
void flash_clear_wrprterr_flag_upper(void)
{
if (MEMORY_SIZE_REG > 512)
if (MEMORY_SIZE_REG > 512) {
FLASH_SR2 |= FLASH_SR_WRPRTERR;
}
}
/*---------------------------------------------------------------------------*/
@@ -161,8 +164,9 @@ void flash_clear_wrprterr_flag_upper(void)
void flash_clear_bsy_flag_upper(void)
{
if (MEMORY_SIZE_REG > 512)
if (MEMORY_SIZE_REG > 512) {
FLASH_SR2 &= ~FLASH_SR_BSY;
}
}
/*---------------------------------------------------------------------------*/
@@ -204,12 +208,14 @@ uint32_t flash_get_status_flags(void)
FLASH_SR_EOP |
FLASH_SR_WRPRTERR |
FLASH_SR_BSY));
if (MEMORY_SIZE_REG > 512)
if (MEMORY_SIZE_REG > 512) {
flags |= (FLASH_SR2 & (FLASH_SR_PGERR |
FLASH_SR_EOP |
FLASH_SR_WRPRTERR |
FLASH_SR_BSY));
return flags;
}
return flags;
}
/*---------------------------------------------------------------------------*/
@@ -229,17 +235,21 @@ void flash_program_half_word(uint32_t address, uint16_t data)
{
flash_wait_for_last_operation();
if ((MEMORY_SIZE_REG > 512) && (address >= FLASH_BASE+0x00080000))
if ((MEMORY_SIZE_REG > 512) && (address >= FLASH_BASE+0x00080000)) {
FLASH_CR2 |= FLASH_CR_PG;
else FLASH_CR |= FLASH_CR_PG;
} else {
FLASH_CR |= FLASH_CR_PG;
}
MMIO16(address) = data;
flash_wait_for_last_operation();
if ((MEMORY_SIZE_REG > 512) && (address >= FLASH_BASE+0x00080000))
if ((MEMORY_SIZE_REG > 512) && (address >= FLASH_BASE+0x00080000)) {
FLASH_CR2 &= ~FLASH_CR_PG;
else FLASH_CR &= ~FLASH_CR_PG;
} else {
FLASH_CR &= ~FLASH_CR_PG;
}
}
/*---------------------------------------------------------------------------*/
@@ -259,7 +269,8 @@ void flash_erase_page(uint32_t page_address)
{
flash_wait_for_last_operation();
if ((MEMORY_SIZE_REG > 512) && (page_address >= FLASH_BASE+0x00080000)) {
if ((MEMORY_SIZE_REG > 512)
&& (page_address >= FLASH_BASE+0x00080000)) {
FLASH_CR2 |= FLASH_CR_PER;
FLASH_AR2 = page_address;
FLASH_CR2 |= FLASH_CR_STRT;
@@ -271,10 +282,12 @@ void flash_erase_page(uint32_t page_address)
flash_wait_for_last_operation();
if ((MEMORY_SIZE_REG > 512) && (page_address >= FLASH_BASE+0x00080000))
if ((MEMORY_SIZE_REG > 512)
&& (page_address >= FLASH_BASE+0x00080000)) {
FLASH_CR2 &= ~FLASH_CR_PER;
else
} else {
FLASH_CR &= ~FLASH_CR_PER;
}
}
/*---------------------------------------------------------------------------*/

12
lib/stm32/f1/rcc.c
View File

@@ -509,7 +509,7 @@ void rcc_set_pllxtpre(uint32_t pllxtpre)
uint32_t rcc_rtc_clock_enabled_flag(void)
{
return RCC_BDCR & RCC_BDCR_RTCEN;
return RCC_BDCR & RCC_BDCR_RTCEN;
}
/*---------------------------------------------------------------------------*/
@@ -638,10 +638,11 @@ The prescale factor can be set to 1 (no prescale) for use when the PLL clock is
void rcc_set_usbpre(uint32_t usbpre)
{
if (usbpre)
if (usbpre) {
RCC_CFGR |= RCC_CFGR_USBPRE;
else
} else {
RCC_CFGR &= ~RCC_CFGR_USBPRE;
}
}
void rcc_set_prediv1(uint32_t prediv)
@@ -658,10 +659,11 @@ void rcc_set_prediv2(uint32_t prediv)
void rcc_set_prediv1_source(uint32_t rccsrc)
{
if (rccsrc)
if (rccsrc) {
RCC_CFGR2 |= RCC_CFGR2_PREDIV1SRC;
else
} else {
RCC_CFGR2 &= ~RCC_CFGR2_PREDIV1SRC;
}
}
/*---------------------------------------------------------------------------*/