[stm32] Use correct offsets for UniqueID bits

STM32L1 has a different set of offsets, not just a different base
address, so we can't have common registers definitions.  Also, out of
F0,F1,F2,F3,F4,L1, only the F1 has the odd note about 2x16bit registers
and 2x32bit registers with one 16bit register marked as "This field
value is also reserved for a future feature."  Therefore, replace the
awkward reading out as multiple words and just copy them in.

F0,F2,F3,F4 were missing definitions altogether.

This does _not_ attempt to address the problem of the mismatched base
addresses for Medium+ and High Density L1 parts.
This commit is contained in:
Karl Palsson
2013-09-23 13:47:01 +00:00
parent 8c8592e2b6
commit a99f4fb620
8 changed files with 43 additions and 26 deletions

View File

@@ -26,15 +26,9 @@ uint16_t desig_get_flash_size(void)
void desig_get_unique_id(uint32_t result[])
{
/* Could also just return a pointer to the start? read it as they wish?
*/
uint16_t bits15_0 = DESIG_UID_15_0;
uint32_t bits31_16 = DESIG_UID_31_16;
uint32_t bits63_32 = DESIG_UID_63_32;
uint32_t bits95_64 = DESIG_UID_95_64;
result[0] = bits95_64;
result[1] = bits63_32;
result[2] = bits31_16 << 16 | bits15_0;
result[0] = DESIG_UNIQUE_ID2;
result[1] = DESIG_UNIQUE_ID1;
result[2] = DESIG_UNIQUE_ID0;
}
void desig_get_unique_id_as_string(char *string,