EMTime/libopencm3
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Cosmetic fixes.

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This commit is contained in:
Thomas Otto
2010-03-28 15:19:32 +02:00
parent 9132e6b9f5
commit 9d2e074b3d
5 changed files with 33 additions and 16 deletions
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18
lib/adc.c
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@@ -286,13 +286,13 @@ void adc_set_conversion_time(u32 adc, u8 channel, u8 time)
if (channel < 10) {
reg32 = ADC_SMPR2(adc);
reg32 &= ~(0b111 << (channel * 3));
reg32 |= (time << (channel *3));
reg32 |= (time << (channel * 3));
ADC_SMPR2(adc) = reg32;
}
else {
reg32 = ADC_SMPR1(adc);
reg32 &= ~(0b111 << ((channel-10) *3));
reg32 |= (time << ((channel-10) *3));
reg32 &= ~(0b111 << ((channel-10) * 3));
reg32 |= (time << ((channel-10) * 3));
ADC_SMPR1(adc) = reg32;
}
}
@@ -302,12 +302,12 @@ void adc_set_conversion_time_on_all_channels(u32 adc, u8 time)
u32 reg32 = 0;
u8 i;
for (i=0; i<=9; i++) {
for (i = 0; i <= 9; i++) {
reg32 |= (time << (i * 3));
}
ADC_SMPR2(adc) = reg32;
for (i=10; i<=17; i++) {
for (i = 10; i <= 17; i++) {
reg32 |= (time << ((i-10) * 3));
}
ADC_SMPR1(adc) = reg32;
@@ -343,11 +343,11 @@ void adc_set_regular_sequence(u32 adc, u8 length, u8 channel[])
return;
for (i=1; i<=length; i++) {
if (i<=6)
if (i <= 6)
reg32_3 |= (channel[i-1] << ((i-1) * 5));
if ((i>6) & (i<=12))
if ((i > 6) & (i <= 12))
reg32_2 |= (channel[i-6-1] << ((i-6-1) * 5));
if ((i>12) & (i<=16))
if ((i > 12) & (i <= 16))
reg32_1 |= (channel[i-12-1] << ((i-12-1) * 5));
}
reg32_1 |= ((length -1) << ADC_SQR1_L_LSB);
@@ -366,7 +366,7 @@ void adc_set_injected_sequence(u32 adc, u8 length, u8 channel[])
if (length > 4)
return;
for (i=1; i<=length; i++) {
for (i = 1; i <= length; i++) {
reg32 |= (channel[i-1] << ((i-1) * 5));
}
reg32 |= ((length-1) << ADC_JSQR_JL_LSB);

14
lib/nvic.c
View File

@@ -25,7 +25,7 @@ void nvic_enable_irq(u8 irqn)
NVIC_ISER(0) |= (1 << irqn);
if ((irqn >= 32) & (irqn < 64))
NVIC_ISER(1) |= (1 << (irqn - 32));
if ((irqn >=64) & (irqn < 68))
if ((irqn >= 64) & (irqn < 68))
NVIC_ISER(2) |= (1 << (irqn - 64));
}
@@ -35,7 +35,7 @@ void nvic_disable_irq(u8 irqn)
NVIC_ICER(0) |= (1 << irqn);
if ((irqn >= 32) & (irqn < 64))
NVIC_ICER(1) |= (1 << (irqn - 32));
if ((irqn >=64) & (irqn < 68))
if ((irqn >= 64) & (irqn < 68))
NVIC_ICER(2) |= (1 << (irqn - 64));
}
@@ -45,7 +45,7 @@ u8 nvic_get_pending_irq(u8 irqn)
return (NVIC_ISPR(0) & (1 << irqn));
if ((irqn >= 32) & (irqn < 64))
return (NVIC_ISPR(1) & (1 << (irqn - 32)));
if ((irqn >=64) & (irqn < 68))
if ((irqn >= 64) & (irqn < 68))
return (NVIC_ISPR(2) & (1 << (irqn - 64)));
return 0;
}
@@ -56,7 +56,7 @@ void nvic_set_pending_irq(u8 irqn)
NVIC_ISPR(0) |= (1 << irqn);
if ((irqn >= 32) & (irqn < 64))
NVIC_ISPR(1) |= (1 << (irqn - 32));
if ((irqn >=64) & (irqn < 68))
if ((irqn >= 64) & (irqn < 68))
NVIC_ISPR(2) |= (1 << (irqn - 64));
}
@@ -66,7 +66,7 @@ void nvic_clear_pending_irq(u8 irqn)
NVIC_ICPR(0) |= (1 << irqn);
if ((irqn >= 32) & (irqn < 64))
NVIC_ICPR(1) |= (1 << (irqn - 32));
if ((irqn >=64) & (irqn < 68))
if ((irqn >= 64) & (irqn < 68))
NVIC_ICPR(2) |= (1 << (irqn - 64));
}
@@ -76,7 +76,7 @@ u8 nvic_get_active_irq(u8 irqn)
return (NVIC_IABR(0) & (1 << irqn));
if ((irqn >= 32) & (irqn < 64))
return (NVIC_IABR(1) & (1 << (irqn - 32)));
if ((irqn >=64) & (irqn < 68))
if ((irqn >= 64) & (irqn < 68))
return (NVIC_IABR(2) & (1 << (irqn - 64)));
return 0;
}
@@ -87,7 +87,7 @@ u8 nvic_get_irq_enabled(u8 irqn)
return (NVIC_ISER(0) & (1 << irqn));
if ((irqn >= 32) & (irqn < 64))
return (NVIC_ISER(1) & (1 << (irqn - 32)));
if ((irqn >=64) & (irqn < 68))
if ((irqn >= 64) & (irqn < 68))
return (NVIC_ISER(2) & (1 << (irqn - 64)));
return 0;
}