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STM32F1xx Additional minor changes to adc.h and adc.c

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This commit is contained in:
Ken Sarkies
2012-08-31 21:47:30 +09:30
parent acc276a612
commit 9af50d6e5c
2 changed files with 15 additions and 5 deletions
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8
include/libopencm3/stm32/f1/adc.h
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@@ -187,9 +187,9 @@ LGPL License Terms @ref lgpl_license
#define ADC_CHANNEL15 0x0F
#define ADC_CHANNEL16 0x10
#define ADC_CHANNEL17 0x11
/**@}*/
#define ADC_MASK 0x1F
#define ADC_SHIFT 0
/**@}*/
/* --- ADC_SR values ------------------------------------------------------- */
@@ -248,9 +248,9 @@ LGPL License Terms @ref lgpl_license
#define ADC_CR1_DUALMOD_SIM (0x8 << 16)
/** Alternate trigger mode only. */
#define ADC_CR1_DUALMOD_ATM (0x9 << 16)
/**@}*/
#define ADC_CR1_DUALMOD_MASK (0xF << 16)
#define ADC_CR1_DUALMOD_SHIFT 16
/**@}*/
/* DISCNUM[2:0]: Discontinous mode channel count. */
/****************************************************************************/
@@ -266,9 +266,9 @@ LGPL License Terms @ref lgpl_license
#define ADC_CR1_DISCNUM_6CHANNELS (0x5 << 13)
#define ADC_CR1_DISCNUM_7CHANNELS (0x6 << 13)
#define ADC_CR1_DISCNUM_8CHANNELS (0x7 << 13)
/**@}*/
#define ADC_CR1_DISCNUM_MASK (0x7 << 13)
#define ADC_CR1_DISCNUM_SHIFT 13
/**@}*/
/* JDISCEN: */ /** Discontinous mode on injected channels. */
#define ADC_CR1_JDISCEN (1 << 12)
@@ -325,9 +325,9 @@ LGPL License Terms @ref lgpl_license
#define ADC_CR1_AWDCH_CHANNEL15 (0x0F << 0)
#define ADC_CR1_AWDCH_CHANNEL16 (0x10 << 0)
#define ADC_CR1_AWDCH_CHANNEL17 (0x11 << 0)
/**@}*/
#define ADC_CR1_AWDCH_MASK (0x1F << 0)
#define ADC_CR1_AWDCH_SHIFT 0
/**@}*/
/* --- ADC_CR2 values ------------------------------------------------------ */