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stm32: desig: refactor to allow targets to have different addresses

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In this commit, support for the different base addresses for different
F7 parts is added, but the mechanism is now in place for L1 and others.

Reviewed-by: Karl Palsson <karlp@tweak.net.au>
(whitespace fixed, commit msg reworded)
This commit is contained in:
Matthew Lai
2019-09-25 12:47:55 +01:00
committed by Karl Palsson
parent f1b4a4dfff
commit 97688b913e
14 changed files with 148 additions and 54 deletions
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3
include/libopencm3/stm32/desig.h
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@@ -25,9 +25,6 @@
/* --- Device Electronic Signature -------------------------------- */
/* Flash size register */
#define DESIG_FLASH_SIZE MMIO16(DESIG_FLASH_SIZE_BASE + 0x00)
BEGIN_DECLS
/**

13
include/libopencm3/stm32/f7/memorymap.h
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@@ -154,11 +154,14 @@
#define DBGMCU_BASE (PPBI_BASE + 0x00042000)
/* Device Electronic Signature */
#define DESIG_FLASH_SIZE_BASE (0x1FF0F422U)
#define DESIG_UNIQUE_ID_BASE (0x1FF0F420U)
#define DESIG_UNIQUE_ID0 MMIO32(DESIG_UNIQUE_ID_BASE)
#define DESIG_UNIQUE_ID1 MMIO32(DESIG_UNIQUE_ID_BASE + 4)
#define DESIG_UNIQUE_ID2 MMIO32(DESIG_UNIQUE_ID_BASE + 8)
/* On F7 the base address are different depending on the device ID in DBBGMCU. */
#define DESIG_FLASH_SIZE_BASE_449 (0x1FF0F422U)
#define DESIG_FLASH_SIZE_BASE_451 (0x1FF0F422U)
#define DESIG_FLASH_SIZE_BASE_452 (0x1FF07A22U)
#define DESIG_UNIQUE_ID_BASE_449 (0x1FF0F420U)
#define DESIG_UNIQUE_ID_BASE_451 (0x1FF0F420U)
#define DESIG_UNIQUE_ID_BASE_452 (0x1FF07A10U)
/* ST provided factory calibration values @ 3.3V */
#define ST_VREFINT_CAL MMIO16(0x1FF07A4A)