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Changed to use accessors instead of casting to volatile pointers.

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In places where we were defining memory mapped peripheral buffers we
were using directly a cast to "volatile int_type *". For consistency we
should use dereferenced accessor like: &MMIO32(address)
This commit is contained in:
Piotr Esden-Tempski
2013-06-12 21:37:55 -07:00
parent 39fa9e4c58
commit 8da7fbd71e
10 changed files with 21 additions and 23 deletions
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4
include/libopencm3/stm32/common/hash_common_f24.h
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@@ -55,7 +55,7 @@ Mikhail Avkhimenia <mikhail@avkhimenia.net>
#define HASH_STR MMIO32(HASH + 0x08)
/* HASH digest registers (HASH_HR[5]) */
#define HASH_HR ((volatile uint32_t*)(HASH + 0x0C)) /* x5 */
#define HASH_HR (&MMIO32(HASH + 0x0C)) /* x5 */
/* HASH interrupt enable register (HASH_IMR) */
#define HASH_IMR MMIO32(HASH + 0x20)
@@ -64,7 +64,7 @@ Mikhail Avkhimenia <mikhail@avkhimenia.net>
#define HASH_SR MMIO32(HASH + 0x28)
/* HASH context swap registers (HASH_CSR[51]) */
#define HASH_CSR ((volatile uint32_t*)(HASH + 0xF8)) /* x51 */
#define HASH_CSR (&MMIO32(HASH + 0xF8)) /* x51 */
/* --- HASH_CR values ------------------------------------------------------ */

12
include/libopencm3/stm32/f1/usb.h
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@@ -49,17 +49,17 @@ LGPL License Terms @ref lgpl_license
/* --- USB general registers ----------------------------------------------- */
/* USB Control register */
#define USB_CNTR_REG ((volatile uint32_t *)(USB_DEV_FS_BASE + 0x40))
#define USB_CNTR_REG (&MMIO32(USB_DEV_FS_BASE + 0x40))
/* USB Interrupt status register */
#define USB_ISTR_REG ((volatile uint32_t *)(USB_DEV_FS_BASE + 0x44))
#define USB_ISTR_REG (&MMIO32(USB_DEV_FS_BASE + 0x44))
/* USB Frame number register */
#define USB_FNR_REG ((volatile uint32_t *)(USB_DEV_FS_BASE + 0x48))
#define USB_FNR_REG (&MMIO32(USB_DEV_FS_BASE + 0x48))
/* USB Device address register */
#define USB_DADDR_REG ((volatile uint32_t *)(USB_DEV_FS_BASE + 0x4C))
#define USB_DADDR_REG (&MMIO32(USB_DEV_FS_BASE + 0x4C))
/* USB Buffer table address register */
#define USB_BTABLE_REG ((volatile uint32_t *)(USB_DEV_FS_BASE + 0x50))
#define USB_BTABLE_REG (&MMIO32(USB_DEV_FS_BASE + 0x50))
/* USB EP register */
#define USB_EP_REG(EP) ((volatile uint32_t *)(USB_DEV_FS_BASE) + (EP))
#define USB_EP_REG(EP) (&MMIO32(USB_DEV_FS_BASE) + (EP))
/* --- USB control register masks / bits ----------------------------------- */

2
include/libopencm3/stm32/otg_fs.h
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@@ -89,7 +89,7 @@
#define OTG_FS_PCGCCTL MMIO32(USB_OTG_FS_BASE + 0xE00)
/* Data FIFO */
#define OTG_FS_FIFO(x) ((volatile uint32_t*)(USB_OTG_FS_BASE \
#define OTG_FS_FIFO(x) (&MMIO32(USB_OTG_FS_BASE \
+ (((x) + 1) \
<< 12)))

3
include/libopencm3/stm32/otg_hs.h
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@@ -145,8 +145,7 @@
#define OTG_HS_PCGCCTL MMIO32(USB_OTG_HS_BASE + OTG_PCGCCTL)
/* Data FIFO */
#define OTG_HS_FIFO(x) ((volatile uint32_t*)(USB_OTG_HS_BASE \
+ OTG_FIFO(x)))
#define OTG_HS_FIFO(x) (&MMIO32(USB_OTG_HS_BASE + OTG_FIFO(x)))
/* Global CSRs */
/* OTG_HS USB control registers (OTG_FS_GOTGCTL) */