stm32:rcc: update _get_clock (uart/i2c) to handle all cases

Adds handling for missing cases.  While i2c only has 3 cases, uarts have
all 4, so make sure they're handled properly.
Removes duplicated/redundant definitions.
Adds doxygen wrappers, even if only for internal use.

Fixes: e41ac6ea71 stm32: added peripheral clock get helpers for all stm32
Signed-of-by: Karl Palsson <karlp@tweak.au>
This commit is contained in:
Karl Palsson
2023-01-13 02:06:34 +00:00
parent df654d7f28
commit 88e91c9a7c
11 changed files with 175 additions and 168 deletions

View File

@@ -532,11 +532,11 @@ void rcc_set_peripheral_clk_sel(uint32_t periph, uint32_t sel)
break;
case USART2_BASE:
shift = RCC_CCIPR_USART2SEL_SHIFT;
mask = RCC_CCIPR_USART2SEL_MASK;
mask = RCC_CCIPR_USARTxSEL_MASK;
break;
case USART1_BASE:
shift = RCC_CCIPR_USART1SEL_SHIFT;
mask = RCC_CCIPR_USART1SEL_MASK;
mask = RCC_CCIPR_USARTxSEL_MASK;
break;
default:
cm3_assert_not_reached();
@@ -548,15 +548,17 @@ void rcc_set_peripheral_clk_sel(uint32_t periph, uint32_t sel)
}
static uint32_t rcc_get_clksel_freq(uint8_t shift) {
uint8_t clksel = (RCC_CCIPR >> shift) & RCC_CCIPR_USART1SEL_MASK;
uint8_t clksel = (RCC_CCIPR >> shift) & RCC_CCIPR_USARTxSEL_MASK;
uint8_t hpre = (RCC_CFGR >> RCC_CFGR_HPRE_SHIFT) & RCC_CFGR_HPRE_MASK;
switch (clksel) {
case RCC_CCIPR_USART1SEL_PCLK:
return rcc_apb1_frequency;
case RCC_CCIPR_USART1SEL_SYSCLK:
return rcc_ahb_frequency * rcc_get_div_from_hpre(hpre);
case RCC_CCIPR_USART1SEL_HSI16:
return 16000000U;
case RCC_CCIPR_USARTxSEL_PCLK:
return rcc_apb1_frequency;
case RCC_CCIPR_USARTxSEL_SYSCLK:
return rcc_ahb_frequency * rcc_get_div_from_hpre(hpre);
case RCC_CCIPR_USARTxSEL_LSE:
return 32768;
case RCC_CCIPR_USARTxSEL_HSI16:
return 16000000U;
}
cm3_assert_not_reached();
}
@@ -571,11 +573,14 @@ uint32_t rcc_get_usart_clk_freq(uint32_t usart)
return rcc_get_clksel_freq(RCC_CCIPR_USART1SEL_SHIFT);
} else if (usart == USART2_BASE) {
return rcc_get_clksel_freq(RCC_CCIPR_USART2SEL_SHIFT);
} else if (usart == USART3_BASE) {
return rcc_get_clksel_freq(RCC_CCIPR_USART3SEL_SHIFT);
} else if (usart == LPUART1_BASE) {
return rcc_get_clksel_freq(RCC_CCIPR_LPUART1SEL_SHIFT);
} else {
return rcc_apb1_frequency;
} else if (usart == LPUART2_BASE) {
return rcc_get_clksel_freq(RCC_CCIPR_LPUART2SEL_SHIFT);
}
cm3_assert_not_reached();
}
/*---------------------------------------------------------------------------*/
@@ -593,13 +598,14 @@ uint32_t rcc_get_timer_clk_freq(uint32_t timer __attribute__((unused)))
/** @brief Get the peripheral clock speed for the I2C device at base specified.
* @param i2c Base address of I2C to get clock frequency for.
*/
uint32_t rcc_get_i2c_clk_freq(uint32_t i2c __attribute__((unused)))
uint32_t rcc_get_i2c_clk_freq(uint32_t i2c)
{
if (i2c == I2C1_BASE) {
return rcc_get_clksel_freq(RCC_CCIPR_I2C1SEL_SHIFT);
} else {
return rcc_apb1_frequency;
} else if (i2c == I2C2_BASE) {
return rcc_get_clksel_freq(RCC_CCIPR_I2C2SEL_SHIFT);
}
cm3_assert_not_reached();
}
/*---------------------------------------------------------------------------*/