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lib/stm32/f1: Coding-style fixes.

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This commit is contained in:
Uwe Hermann
2011-11-16 19:31:47 +01:00
parent 6e7403f769
commit 8725bc5171
10 changed files with 452 additions and 482 deletions
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67
lib/stm32/f1/adc.c
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@@ -177,19 +177,19 @@ void adc_disable_temperature_sensor(u32 adc)
void adc_start_conversion_regular(u32 adc)
{
/* start conversion on regular channels */
/* Start conversion on regular channels. */
ADC_CR2(adc) |= ADC_CR2_SWSTART;
/* wait til the ADC starts the conversion */
/* Wait until the ADC starts the conversion. */
while (ADC_CR2(adc) & ADC_CR2_SWSTART);
}
void adc_start_conversion_injected(u32 adc)
{
/* start conversion on injected channels */
/* Start conversion on injected channels. */
ADC_CR2(adc) |= ADC_CR2_JSWSTART;
/* wait til the ADC starts the conversion */
/* Wait until the ADC starts the conversion. */
while (ADC_CR2(adc) & ADC_CR2_JSWSTART);
}
@@ -237,16 +237,16 @@ void adc_set_right_aligned(u32 adc)
void adc_enable_dma(u32 adc)
{
if ((adc == ADC1) | (adc==ADC3))
if ((adc == ADC1) | (adc == ADC3))
ADC_CR2(adc) |= ADC_CR2_DMA;
}
void adc_disable_dma(u32 adc)
{
if ((adc == ADC1) | (adc==ADC3))
if ((adc == ADC1) | (adc == ADC3))
ADC_CR2(adc) &= ~ADC_CR2_DMA;
}
void adc_reset_calibration(u32 adc)
{
ADC_CR2(adc) |= ADC_CR2_RSTCAL;
@@ -285,31 +285,28 @@ void adc_set_conversion_time(u32 adc, u8 channel, u8 time)
if (channel < 10) {
reg32 = ADC_SMPR2(adc);
reg32 &= ~(0b111 << (channel * 3));
reg32 &= ~(0x7 << (channel * 3));
reg32 |= (time << (channel * 3));
ADC_SMPR2(adc) = reg32;
}
else {
} else {
reg32 = ADC_SMPR1(adc);
reg32 &= ~(0b111 << ((channel-10) * 3));
reg32 |= (time << ((channel-10) * 3));
reg32 &= ~(0x7 << ((channel - 10) * 3));
reg32 |= (time << ((channel - 10) * 3));
ADC_SMPR1(adc) = reg32;
}
}
void adc_set_conversion_time_on_all_channels(u32 adc, u8 time)
{
u32 reg32 = 0;
u8 i;
u32 reg32 = 0;
for (i = 0; i <= 9; i++) {
for (i = 0; i <= 9; i++)
reg32 |= (time << (i * 3));
}
ADC_SMPR2(adc) = reg32;
for (i = 10; i <= 17; i++) {
reg32 |= (time << ((i-10) * 3));
}
for (i = 10; i <= 17; i++)
reg32 |= (time << ((i - 10) * 3));
ADC_SMPR1(adc) = reg32;
}
@@ -318,7 +315,7 @@ void adc_set_watchdog_high_threshold(u32 adc, u16 threshold)
u32 reg32 = 0;
reg32 = (u32)threshold;
reg32 &= ~0xfffff000; /* clear all bits above 11 */
reg32 &= ~0xfffff000; /* Clear all bits above 11. */
ADC_HTR(adc) = reg32;
}
@@ -327,28 +324,26 @@ void adc_set_watchdog_low_threshold(u32 adc, u16 threshold)
u32 reg32 = 0;
reg32 = (u32)threshold;
reg32 &= ~0xfffff000; /* clear all bits above 11 */
reg32 &= ~0xfffff000; /* Clear all bits above 11. */
ADC_LTR(adc) = reg32;
}
void adc_set_regular_sequence(u32 adc, u8 length, u8 channel[])
{
u32 reg32_1 = 0;
u32 reg32_2 = 0;
u32 reg32_3 = 0;
u32 reg32_1 = 0, reg32_2 = 0, reg32_3 = 0;
u8 i = 0;
/* maximum sequence length is 16 channels */
/* Maximum sequence length is 16 channels. */
if (length > 16)
return;
for (i=1; i<=length; i++) {
if (i <= 6)
reg32_3 |= (channel[i-1] << ((i-1) * 5));
for (i = 1; i <= length; i++) {
if (i <= 6)
reg32_3 |= (channel[i - 1] << ((i - 1) * 5));
if ((i > 6) & (i <= 12))
reg32_2 |= (channel[i-1] << ((i-6-1) * 5));
reg32_2 |= (channel[i - 1] << ((i - 6 - 1) * 5));
if ((i > 12) & (i <= 16))
reg32_1 |= (channel[i-1] << ((i-12-1) * 5));
reg32_1 |= (channel[i - 1] << ((i - 12 - 1) * 5));
}
reg32_1 |= ((length -1) << ADC_SQR1_L_LSB);
@@ -362,14 +357,14 @@ void adc_set_injected_sequence(u32 adc, u8 length, u8 channel[])
u32 reg32 = 0;
u8 i = 0;
/* maximum sequence length is 4 channels */
/* Maximum sequence length is 4 channels. */
if (length > 4)
return;
for (i = 1; i <= length; i++) {
reg32 |= (channel[i-1] << ((i-1) * 5));
}
reg32 |= ((length-1) << ADC_JSQR_JL_LSB);
for (i = 1; i <= length; i++)
reg32 |= (channel[i - 1] << ((i - 1) * 5));
reg32 |= ((length - 1) << ADC_JSQR_JL_LSB);
ADC_JSQR(adc) = reg32;
}