First coarse run to fix coding style in locm3.
Added --terse and --mailback options to the make stylecheck target. It also does continue even if it enounters a possible error. We decided on two exceptions from the linux kernel coding standard: - Empty wait while loops may end with ; on the same line. - All blocks after while, if, for have to be in brackets even if they only contain one statement. Otherwise it is easy to introduce an error. Checkpatch needs to be adapted to reflect those changes.
This commit is contained in:
Piotr Esden-Tempski
@@ -120,12 +120,12 @@ LGPL License Terms @ref lgpl_license
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#define MASK8 0xFF
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#define MASK12 0xFFF
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/*-----------------------------------------------------------------------------*/
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/*---------------------------------------------------------------------------*/
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/** @brief DAC Channel Enable.
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Enable a digital to analog converter channel. After setting this enable, the DAC
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requires a t<sub>wakeup</sub> time typically around 10 microseconds before it
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actually wakes up.
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Enable a digital to analog converter channel. After setting this enable, the
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DAC requires a t<sub>wakeup</sub> time typically around 10 microseconds before
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it actually wakes up.
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@param[in] dac_channel enum ::data_channel.
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*/
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@@ -145,7 +145,7 @@ void dac_enable(data_channel dac_channel)
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}
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}
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/*-----------------------------------------------------------------------------*/
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/*---------------------------------------------------------------------------*/
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/** @brief DAC Channel Disable.
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Disable a digital to analog converter channel.
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@@ -168,13 +168,13 @@ void dac_disable(data_channel dac_channel)
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}
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}
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/*-----------------------------------------------------------------------------*/
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/*---------------------------------------------------------------------------*/
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/** @brief DAC Channel Output Buffer Enable.
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Enable a digital to analog converter channel output drive buffer. This is an optional
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amplifying buffer that provides additional drive for the output signal. The
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buffer is enabled by default after a reset and needs to be explicitly disabled
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if required.
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Enable a digital to analog converter channel output drive buffer. This is an
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optional amplifying buffer that provides additional drive for the output
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signal. The buffer is enabled by default after a reset and needs to be
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explicitly disabled if required.
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@param[in] dac_channel enum ::data_channel.
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*/
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@@ -193,12 +193,12 @@ void dac_buffer_enable(data_channel dac_channel)
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break;
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}
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}
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/*-----------------------------------------------------------------------------*/
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/*---------------------------------------------------------------------------*/
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/** @brief DAC Channel Output Buffer Disable.
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Disable a digital to analog converter channel output drive buffer. Disabling this will
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reduce power consumption slightly and will increase the output impedance of the DAC.
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The buffers are enabled by default after a reset.
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Disable a digital to analog converter channel output drive buffer. Disabling
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this will reduce power consumption slightly and will increase the output
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impedance of the DAC. The buffers are enabled by default after a reset.
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@param[in] dac_channel enum ::data_channel.
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*/
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@@ -217,7 +217,7 @@ void dac_buffer_disable(data_channel dac_channel)
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break;
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}
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}
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/*-----------------------------------------------------------------------------*/
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/*---------------------------------------------------------------------------*/
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/** @brief DAC Channel DMA Enable.
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Enable a digital to analog converter channel DMA mode (connected to DMA2 channel
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@@ -242,7 +242,7 @@ void dac_dma_enable(data_channel dac_channel)
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}
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}
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/*-----------------------------------------------------------------------------*/
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/*---------------------------------------------------------------------------*/
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/** @brief DAC Channel DMA Disable.
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Disable a digital to analog converter channel DMA mode.
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@@ -265,13 +265,13 @@ void dac_dma_disable(data_channel dac_channel)
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}
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}
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/*-----------------------------------------------------------------------------*/
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/*---------------------------------------------------------------------------*/
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/** @brief DAC Channel Trigger Enable.
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Enable a digital to analog converter channel external trigger mode. This allows an
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external trigger to initiate register transfers from the buffer register to the DAC
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output register, followed by a DMA transfer to the buffer register if DMA is enabled.
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The trigger source must also be selected.
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Enable a digital to analog converter channel external trigger mode. This allows
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an external trigger to initiate register transfers from the buffer register to
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the DAC output register, followed by a DMA transfer to the buffer register if
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DMA is enabled. The trigger source must also be selected.
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@param[in] dac_channel enum ::data_channel.
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*/
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@@ -291,7 +291,7 @@ void dac_trigger_enable(data_channel dac_channel)
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}
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}
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/*-----------------------------------------------------------------------------*/
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/*---------------------------------------------------------------------------*/
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/** @brief DAC Channel Trigger Disable.
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Disable a digital to analog converter channel external trigger.
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@@ -314,14 +314,15 @@ void dac_trigger_disable(data_channel dac_channel)
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}
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}
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/*-----------------------------------------------------------------------------*/
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/*---------------------------------------------------------------------------*/
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/** @brief Set DAC Channel Trigger Source.
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Sets the digital to analog converter trigger source, which can be taken from various
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timers, an external trigger or a software trigger.
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Sets the digital to analog converter trigger source, which can be taken from
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various timers, an external trigger or a software trigger.
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@param[in] dac_trig_src u32. Taken from @ref dac_trig2_sel or @ref dac_trig1_sel or
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a logical OR of one of each of these to set both channels simultaneously.
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@param[in] dac_trig_src u32. Taken from @ref dac_trig2_sel or @ref
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dac_trig1_sel or a logical OR of one of each of these to set both channels
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simultaneously.
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*/
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void dac_set_trigger_source(u32 dac_trig_src)
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@@ -329,17 +330,17 @@ void dac_set_trigger_source(u32 dac_trig_src)
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DAC_CR |= dac_trig_src;
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}
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/*-----------------------------------------------------------------------------*/
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/*---------------------------------------------------------------------------*/
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/** @brief Enable and Set DAC Channel Waveform Generation.
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Enable the digital to analog converter waveform generation as either pseudo-random
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noise or triangular wave. These signals are superimposed on existing output values
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in the DAC output registers.
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Enable the digital to analog converter waveform generation as either
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pseudo-random noise or triangular wave. These signals are superimposed on
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existing output values in the DAC output registers.
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@note The DAC trigger must be enabled for this to work.
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@param[in] dac_wave_ens u32. Taken from @ref dac_wave1_en or @ref dac_wave2_en or
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a logical OR of one of each of these to set both channels simultaneously.
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@param[in] dac_wave_ens u32. Taken from @ref dac_wave1_en or @ref dac_wave2_en
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or a logical OR of one of each of these to set both channels simultaneously.
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*/
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void dac_set_waveform_generation(u32 dac_wave_ens)
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@@ -347,7 +348,7 @@ void dac_set_waveform_generation(u32 dac_wave_ens)
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DAC_CR |= dac_wave_ens;
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}
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/*-----------------------------------------------------------------------------*/
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/*---------------------------------------------------------------------------*/
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/** @brief Disable DAC Channel Waveform Generation.
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Disable a digital to analog converter channel superimposed waveform generation.
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@@ -370,22 +371,24 @@ void dac_disable_waveform_generation(data_channel dac_channel)
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}
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}
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/*-----------------------------------------------------------------------------*/
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/*---------------------------------------------------------------------------*/
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/** @brief Set DAC Channel LFSR Mask or Triangle Wave Amplitude.
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Sets the digital to analog converter superimposed waveform generation characteristics.
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@li If the noise generation mode is set, this sets the length of the PRBS sequence and
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hence the amplitude of the output noise signal. Default setting is length 1.
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@li If the triangle wave generation mode is set, this sets the amplitude of the
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output signal as 2^(n)-1 where n is the parameter value. Default setting is 1.
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Sets the digital to analog converter superimposed waveform generation
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characteristics. @li If the noise generation mode is set, this sets the length
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of the PRBS sequence and hence the amplitude of the output noise signal.
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Default setting is length 1. @li If the triangle wave generation mode is set,
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this sets the amplitude of the output signal as 2^(n)-1 where n is the
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parameter value. Default setting is 1.
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@note High amplitude levels of these waveforms can overload the DAC and distort the
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signal output.
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@note This must be called before enabling the DAC as the settings will then become read-only.
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@note High amplitude levels of these waveforms can overload the DAC and distort
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the signal output.
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@note This must be called before enabling the DAC as the settings will then
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become read-only.
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@note The DAC trigger must be enabled for this to work.
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@param[in] dac_mamp u32. Taken from @ref dac_mamp2 or @ref dac_mamp1 or a logical OR
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of one of each of these to set both channels simultaneously.
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@param[in] dac_mamp u32. Taken from @ref dac_mamp2 or @ref dac_mamp1 or a
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logical OR of one of each of these to set both channels simultaneously.
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*/
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void dac_set_waveform_characteristics(u32 dac_mamp)
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@@ -393,7 +396,7 @@ void dac_set_waveform_characteristics(u32 dac_mamp)
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DAC_CR |= dac_mamp;
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}
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/*-----------------------------------------------------------------------------*/
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/*---------------------------------------------------------------------------*/
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/** @brief Load DAC Data Register.
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Loads the appropriate digital to analog converter data register with 12 or 8 bit
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@@ -407,10 +410,10 @@ data to be converted on a channel. The data can be aligned as follows:
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@param[in] dac_channel enum ::data_channel.
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*/
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void dac_load_data_buffer_single(u16 dac_data, data_align dac_data_format, data_channel dac_channel)
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void dac_load_data_buffer_single(u16 dac_data, data_align dac_data_format,
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data_channel dac_channel)
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{
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if (dac_channel == CHANNEL_1)
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{
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if (dac_channel == CHANNEL_1) {
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switch (dac_data_format) {
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case RIGHT8:
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DAC_DHR8R1 = dac_data;
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@@ -422,9 +425,7 @@ void dac_load_data_buffer_single(u16 dac_data, data_align dac_data_format, data_
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DAC_DHR12L1 = dac_data;
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break;
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}
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}
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else if (dac_channel == CHANNEL_2)
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{
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} else if (dac_channel == CHANNEL_2) {
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switch (dac_data_format) {
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case RIGHT8:
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DAC_DHR8R2 = dac_data;
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@@ -439,7 +440,7 @@ void dac_load_data_buffer_single(u16 dac_data, data_align dac_data_format, data_
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}
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}
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/*-----------------------------------------------------------------------------*/
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/*---------------------------------------------------------------------------*/
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/** @brief Load DAC Dual Data Register.
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Loads the appropriate digital to analog converter dual data register with 12 or
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@@ -449,25 +450,29 @@ identically.
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@param[in] dac_data1 u16 for channel 1 with appropriate alignment.
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@param[in] dac_data2 u16 for channel 2 with appropriate alignment.
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@param[in] dac_data_format enum ::data_align. Right or left aligned, and 8 or 12 bit.
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@param[in] dac_data_format enum ::data_align. Right or left aligned, and 8 or
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12 bit.
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*/
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void dac_load_data_buffer_dual(u16 dac_data1, u16 dac_data2, data_align dac_data_format)
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void dac_load_data_buffer_dual(u16 dac_data1, u16 dac_data2,
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data_align dac_data_format)
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{
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switch (dac_data_format) {
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case RIGHT8:
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DAC_DHR8RD = ((dac_data1 & MASK8) | ((dac_data2 & MASK8) << 8));
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break;
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case RIGHT12:
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DAC_DHR12RD = ((dac_data1 & MASK12) | ((dac_data2 & MASK12) << 16));
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DAC_DHR12RD = ((dac_data1 & MASK12) |
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((dac_data2 & MASK12) << 16));
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break;
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case LEFT12:
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DAC_DHR12LD = ((dac_data1 & MASK12) | ((dac_data2 & MASK12) << 16));
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DAC_DHR12LD = ((dac_data1 & MASK12) |
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((dac_data2 & MASK12) << 16));
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break;
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}
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}
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/*-----------------------------------------------------------------------------*/
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/*---------------------------------------------------------------------------*/
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/** @brief Trigger the DAC by a Software Trigger.
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If the trigger source is set to be a software trigger, cause a trigger to occur.
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