First coarse run to fix coding style in locm3.

Added --terse and --mailback options to the make stylecheck target. It also does continue even if it enounters a possible error. We decided on two exceptions from the linux kernel coding standard: - Empty wait while loops may end with ; on the same line. - All blocks after while, if, for have to be in brackets even if they only contain one statement. Otherwise it is easy to introduce an error. Checkpatch needs to be adapted to reflect those changes.
2013-06-12 17:44:07 -07:00
parent 48e0f3326b
commit 7df63fcae0
147 changed files with 3323 additions and 2565 deletions
@@ -1,12 +1,14 @@
 /** @defgroup adc_defines ADC Defines

-@brief <b>Defined Constants and Types for the STM32F1xx Analog to Digital Converters</b>
+@brief <b>Defined Constants and Types for the STM32F1xx Analog to Digital
+Converters</b>

@ingroup STM32F1xx_defines

@version 1.0.0

-@author @htmlonly &copy; @endhtmlonly 2009 Edward Cheeseman <evbuilder@users.sourceforge.net>
+@author @htmlonly &copy; @endhtmlonly 2009
+Edward Cheeseman <evbuilder@users.sourceforge.net>

@date 18 August 2012

@@ -404,7 +406,8 @@ LGPL License Terms @ref lgpl_license
 /* The following are only valid for ADC1 and ADC2. */
 /****************************************************************************/
 /* ADC_CR2 JEXTSEL[2:0] ADC Injected Trigger Identifier for ADC1 and ADC2 */
-/** @defgroup adc_trigger_injected_12 ADC Injected Trigger Identifier for ADC1 and ADC2
+/** @defgroup adc_trigger_injected_12 ADC Injected Trigger Identifier for ADC1
+and ADC2
@ingroup adc_defines

@{*/
@@ -677,7 +680,8 @@ void adc_reset_calibration(u32 adc);
 void adc_calibration(u32 adc);
 void adc_set_continuous_conversion_mode(u32 adc);
 void adc_set_single_conversion_mode(u32 adc);
-void adc_on(u32 adc) LIBOPENCM3_DEPRECATED("will be removed in the first release");
+void adc_on(u32 adc)
+	LIBOPENCM3_DEPRECATED("will be removed in the first release");
 void adc_off(u32 adc);
 void adc_set_sample_time(u32 adc, u8 channel, u8 time);
 void adc_set_sample_time_on_all_channels(u32 adc, u8 time);
@@ -686,11 +690,16 @@ void adc_set_watchdog_low_threshold(u32 adc, u16 threshold);
 void adc_set_regular_sequence(u32 adc, u8 length, u8 channel[]);
 void adc_set_injected_sequence(u32 adc, u8 length, u8 channel[]);

-void adc_set_continous_conversion_mode(u32 adc) LIBOPENCM3_DEPRECATED("change to adc_set_continuous_conversion_mode");
-void adc_set_conversion_time(u32 adc, u8 channel, u8 time) LIBOPENCM3_DEPRECATED("change to adc_set_sample_time");
-void adc_set_conversion_time_on_all_channels(u32 adc, u8 time) LIBOPENCM3_DEPRECATED("change to adc_set_sample_time_on_all_channels");
-void adc_enable_jeoc_interrupt(u32 adc) LIBOPENCM3_DEPRECATED("change to adc_enable_eoc_interrupt_injected");
-void adc_disable_jeoc_interrupt(u32 adc) LIBOPENCM3_DEPRECATED("change to adc_disable_eoc_interrupt_injected");
+void adc_set_continous_conversion_mode(u32 adc)
+	LIBOPENCM3_DEPRECATED("change to adc_set_continuous_conversion_mode");
+void adc_set_conversion_time(u32 adc, u8 channel, u8 time)
+	LIBOPENCM3_DEPRECATED("change to adc_set_sample_time");
+void adc_set_conversion_time_on_all_channels(u32 adc, u8 time)
+	LIBOPENCM3_DEPRECATED("change to adc_set_sample_time_on_all_channels");
+void adc_enable_jeoc_interrupt(u32 adc)
+	LIBOPENCM3_DEPRECATED("change to adc_enable_eoc_interrupt_injected");
+void adc_disable_jeoc_interrupt(u32 adc)
+	LIBOPENCM3_DEPRECATED("change to adc_disable_eoc_interrupt_injected");
 END_DECLS

 #endif
@@ -1,6 +1,7 @@
 /** @defgroup crc_defines CRC Defines

-@brief <b>libopencm3 Defined Constants and Types for the STM32F1xx CRC Generator </b>
+@brief <b>libopencm3 Defined Constants and Types for the STM32F1xx CRC
+Generator </b>

@ingroup STM32F1xx_defines

@@ -22,7 +22,7 @@
 * For details see:
 * PM0075 programming manual: STM32F10xxx Flash programming
 * August 2010, Doc ID 17863 Rev 1
- * http://www.st.com/st-web-ui/static/active/en/resource/technical/document/programming_manual/CD00283419.pdf
+ * http://goo.gl/MuTiU
 */

 #ifndef LIBOPENCM3_FLASH_H
@@ -497,26 +497,26 @@ LGPL License Terms @ref lgpl_license

 /* ETH GPIO */
 #define GPIO_ETH_RX_DV_CRS_DV		GPIO7		/* PA7 */
-#define GPIO_ETH_RXD0  			GPIO4		/* PC4 */
+#define GPIO_ETH_RXD0			GPIO4		/* PC4 */
 #define GPIO_ETH_RXD1			GPIO5		/* PC5 */
 #define GPIO_ETH_RXD2			GPIO0		/* PB0 */
 #define GPIO_ETH_RXD3			GPIO1		/* PB1 */

 #define GPIO_ETH_RE_RX_DV_CRS_DV	GPIO8		/* PD8 */
-#define GPIO_ETH_RE_RXD0  		GPIO9		/* PD9 */
+#define GPIO_ETH_RE_RXD0		GPIO9		/* PD9 */
 #define GPIO_ETH_RE_RXD1		GPIO10		/* PD10 */
 #define GPIO_ETH_RE_RXD2		GPIO11		/* PD11 */
 #define GPIO_ETH_RE_RXD3		GPIO12		/* PD12 */

 /* ETH BANK */
 #define GPIO_BANK_ETH_RX_DV_CRS_DV	GPIOA		/* PA7 */
-#define GPIO_BANK_ETH_RXD0  		GPIOC		/* PC4 */
+#define GPIO_BANK_ETH_RXD0		GPIOC		/* PC4 */
 #define GPIO_BANK_ETH_RXD1		GPIOC		/* PC5 */
 #define GPIO_BANK_ETH_RXD2		GPIOB		/* PB0 */
 #define GPIO_BANK_ETH_RXD3		GPIOB		/* PB1 */

 #define GPIO_BANK_ETH_RE_RX_DV_CRS_DV	GPIOD		/* PD8 */
-#define GPIO_BANK_ETH_RE_RXD0  		GPIOD		/* PD9 */
+#define GPIO_BANK_ETH_RE_RXD0		GPIOD		/* PD9 */
 #define GPIO_BANK_ETH_RE_RXD1		GPIOD		/* PD10 */
 #define GPIO_BANK_ETH_RE_RXD2		GPIOD		/* PD11 */
 #define GPIO_BANK_ETH_RE_RXD3		GPIOD		/* PD12 */
@@ -729,28 +729,28 @@ Line Devices only
@ingroup gpio_defines

@{*/
-/* PTP_PPS_REMAP: *//** Ethernet PTP PPS remapping
- * (only connectivity line devices) */
+/* PTP_PPS_REMAP: */
+/** Ethernet PTP PPS remapping (only connectivity line devices) */
 #define AFIO_MAPR_PTP_PPS_REMAP			(1 << 30)

-/* TIM2ITR1_IREMAP: *//** TIM2 internal trigger 1 remapping
- * (only connectivity line devices) */
+/* TIM2ITR1_IREMAP: */
+/** TIM2 internal trigger 1 remapping (only connectivity line devices) */
 #define AFIO_MAPR_TIM2ITR1_IREMAP		(1 << 29)

-/* SPI3_REMAP: *//** SPI3/I2S3 remapping
- * (only connectivity line devices) */
+/* SPI3_REMAP: */
+/** SPI3/I2S3 remapping (only connectivity line devices) */
 #define AFIO_MAPR_SPI3_REMAP			(1 << 28)

-/* MII_REMAP: */ /** MII or RMII selection
- * (only connectivity line devices) */
+/* MII_REMAP: */
+/** MII or RMII selection (only connectivity line devices) */
 #define AFIO_MAPR_MII_RMII_SEL			(1 << 23)

-/* CAN2_REMAP: */ /**  CAN2 I/O remapping
- * (only connectivity line devices) */
+/* CAN2_REMAP: */
+/**  CAN2 I/O remapping (only connectivity line devices) */
 #define AFIO_MAPR_CAN2_REMAP			(1 << 22)

-/* ETH_REMAP: */ /**  Ethernet MAC I/O remapping
- * (only connectivity line devices) */
+/* ETH_REMAP: */
+/**  Ethernet MAC I/O remapping (only connectivity line devices) */
 #define AFIO_MAPR_ETH_REMAP			(1 << 21)

 /**@}*/
@@ -763,9 +763,9 @@ Line Devices only

@{*/
 #define AFIO_MAPR_SWJ_MASK			(0x7 << 24)
-/** Full Serial Wire JTAG capability */ 
+/** Full Serial Wire JTAG capability */
 #define AFIO_MAPR_SWJ_CFG_FULL_SWJ		(0x0 << 24)
-/** Full Serial Wire JTAG capability without JNTRST */ 
+/** Full Serial Wire JTAG capability without JNTRST */
 #define AFIO_MAPR_SWJ_CFG_FULL_SWJ_NO_JNTRST	(0x1 << 24)
 /** JTAG-DP disabled with SW-DP enabled */
 #define AFIO_MAPR_SWJ_CFG_JTAG_OFF_SW_ON	(0x2 << 24)
@@ -777,41 +777,60 @@ Line Devices only
@ingroup gpio_defines

@{*/
-/* ADC2_ETRGREG_REMAP: */ /**  ADC2 external trigger regulator conversion remapping
- * (only low-, medium-, high- and XL-densitiy devices) */
+/* ADC2_ETRGREG_REMAP: */
+/** 
+ * ADC2 external trigger regulator conversion remapping
+ * (only low-, medium-, high- and XL-densitiy devices)
+ */
 #define AFIO_MAPR_ADC2_ETRGREG_REMAP		(1 << 20)

-/* ADC2_ETRGINJ_REMAP: */ /**  ADC2 external trigger injected conversion remapping
- * (only low-, medium-, high- and XL-densitiy devices) */
+/* ADC2_ETRGINJ_REMAP: */
+/**
+ * ADC2 external trigger injected conversion remapping
+ * (only low-, medium-, high- and XL-densitiy devices)
+ */
 #define AFIO_MAPR_ADC2_ETRGINJ_REMAP		(1 << 19)

-/* ADC1_ETRGREG_REMAP: */ /**  ADC1 external trigger regulator conversion remapping
- * (only low-, medium-, high- and XL-densitiy devices) */
+/* ADC1_ETRGREG_REMAP: */
+/**
+ * ADC1 external trigger regulator conversion remapping
+ * (only low-, medium-, high- and XL-densitiy devices)
+ */
 #define AFIO_MAPR_ADC1_ETRGREG_REMAP		(1 << 18)

-/* ADC1_ETRGINJ_REMAP: */ /**  ADC1 external trigger injected conversion remapping
- * (only low-, medium-, high- and XL-densitiy devices) */
+/* ADC1_ETRGINJ_REMAP: */
+/**
+ * ADC1 external trigger injected conversion remapping
+ * (only low-, medium-, high- and XL-densitiy devices)
+ */
 #define AFIO_MAPR_ADC1_ETRGINJ_REMAP		(1 << 17)

-/* TIM5CH4_IREMAP: */ /**  TIM5 channel4 internal remap */
+/* TIM5CH4_IREMAP: */
+/** TIM5 channel4 internal remap */
 #define AFIO_MAPR_TIM5CH4_IREMAP		(1 << 16)

-/* PD01_REMAP: */ /**  Port D0/Port D1 mapping on OSC_IN/OSC_OUT */
+/* PD01_REMAP: */
+/** Port D0/Port D1 mapping on OSC_IN/OSC_OUT */
 #define AFIO_MAPR_PD01_REMAP			(1 << 15)

-/* TIM4_REMAP: */ /**  TIM4 remapping */
+/* TIM4_REMAP: */
+/** TIM4 remapping */
 #define AFIO_MAPR_TIM4_REMAP			(1 << 12)

-/* USART2_REMAP[1:0]: */ /**  USART2 remapping */
+/* USART2_REMAP[1:0]: */
+/** USART2 remapping */
 #define AFIO_MAPR_USART2_REMAP			(1 << 3)

-/* USART1_REMAP[1:0]: */ /**  USART1 remapping */
+/* USART1_REMAP[1:0]: */
+/** USART1 remapping */
 #define AFIO_MAPR_USART1_REMAP			(1 << 2)

-/* I2C1_REMAP[1:0]: */ /**  I2C1 remapping */
+/* I2C1_REMAP[1:0]: */
+/** I2C1 remapping */
 #define AFIO_MAPR_I2C1_REMAP			(1 << 1)

-/* SPI1_REMAP[1:0]: */ /**  SPI1 remapping */
+/* SPI1_REMAP[1:0]: */
+/** SPI1 remapping */
 #define AFIO_MAPR_SPI1_REMAP			(1 << 0)
 /**@}*/

@@ -821,7 +840,7 @@ Line Devices only

@{*/
 #define AFIO_MAPR_CAN1_REMAP_PORTA		(0x0 << 13)
-#define AFIO_MAPR_CAN1_REMAP_PORTB		(0x2 << 13) /* Not on 36pin pkg */
+#define AFIO_MAPR_CAN1_REMAP_PORTB		(0x2 << 13) /* Not 36pin pkg */
 #define AFIO_MAPR_CAN1_REMAP_PORTD		(0x3 << 13)
 /**@}*/

@@ -870,22 +889,28 @@ Line Devices only
@ingroup gpio_defines

@{*/
-/* FSMC_NADV_DISCONNECT: */ /** The NADV is disconnected from its allocated pin */
+/* FSMC_NADV_DISCONNECT: */
+/** The NADV is disconnected from its allocated pin */
 #define AFIO_MAPR2_FSMC_NADV_DISCONNECT			(1 << 10)

-/* TIM14_REMAP: */ /**  TIM14 remapping */
+/* TIM14_REMAP: */
+/**  TIM14 remapping */
 #define AFIO_MAPR2_TIM14_REMAP			(1 << 9)

-/* TIM13_REMAP: */ /**  TIM13 remapping */
+/* TIM13_REMAP: */
+/**  TIM13 remapping */
 #define AFIO_MAPR2_TIM13_REMAP			(1 << 8)

-/* TIM11_REMAP: */ /**  TIM11 remapping */
+/* TIM11_REMAP: */
+/**  TIM11 remapping */
 #define AFIO_MAPR2_TIM11_REMAP			(1 << 7)

-/* TIM10_REMAP: */ /**  TIM10 remapping */
+/* TIM10_REMAP: */
+/**  TIM10 remapping */
 #define AFIO_MAPR2_TIM10_REMAP			(1 << 6)

-/* TIM9_REMAP: */ /**  TIM9 remapping */
+/* TIM9_REMAP: */
+/**  TIM9 remapping */
 #define AFIO_MAPR2_TIM9_REMAP			(1 << 5)

 /**@}*/
@@ -1,6 +1,7 @@
 /** @defgroup iwdg_defines IWDG Defines

-@brief <b>Defined Constants and Types for the STM32F1xx Independent Watchdog Timer</b>
+@brief <b>Defined Constants and Types for the STM32F1xx Independent Watchdog
+Timer</b>

@ingroup STM32F1xx_defines

@@ -6,8 +6,10 @@

@version 1.0.0

-@author @htmlonly &copy; @endhtmlonly 2009 Federico Ruiz-Ugalde \<memeruiz at gmail dot com\>
-@author @htmlonly &copy; @endhtmlonly 2009 Uwe Hermann <uwe@hermann-uwe.de>
+@author @htmlonly &copy; @endhtmlonly 2009
+Federico Ruiz-Ugalde \<memeruiz at gmail dot com\>
+@author @htmlonly &copy; @endhtmlonly 2009
+Uwe Hermann <uwe@hermann-uwe.de>

@date 18 August 2012

@@ -55,8 +57,8 @@ LGPL License Terms @ref lgpl_license
 #define RCC_APB1ENR				MMIO32(RCC_BASE + 0x1c)
 #define RCC_BDCR				MMIO32(RCC_BASE + 0x20)
 #define RCC_CSR					MMIO32(RCC_BASE + 0x24)
-#define RCC_AHBRSTR				MMIO32(RCC_BASE + 0x28) /* (**) */
-#define RCC_CFGR2				MMIO32(RCC_BASE + 0x2c) /* (**) */
+#define RCC_AHBRSTR				MMIO32(RCC_BASE + 0x28) /*(**)*/
+#define RCC_CFGR2				MMIO32(RCC_BASE + 0x2c) /*(**)*/

 /* --- RCC_CR values ------------------------------------------------------- */

@@ -125,9 +127,10 @@ LGPL License Terms @ref lgpl_license
 #define RCC_CFGR_PLLMUL_PLL_CLK_MUL13		0xb /* (XX) */
 #define RCC_CFGR_PLLMUL_PLL_CLK_MUL14		0xc /* (XX) */
 #define RCC_CFGR_PLLMUL_PLL_CLK_MUL15		0xd /* 0xd: PLL x 15 */
-#define RCC_CFGR_PLLMUL_PLL_CLK_MUL6_5		0xd /* 0xd: PLL x 6.5 for conn. line */
+#define RCC_CFGR_PLLMUL_PLL_CLK_MUL6_5		0xd /* 0xd: PLL x 6.5 for conn.
+						       line */
 #define RCC_CFGR_PLLMUL_PLL_CLK_MUL16		0xe /* (XX) */
-// #define PLLMUL_PLL_CLK_MUL16		0xf /* (XX) */ /* Errata? 17? */
+/* #define PLLMUL_PLL_CLK_MUL16		0xf */ /* (XX) */ /* Errata? 17? */
 /**@}*/

 /* TODO: conn. line differs. */
@@ -286,7 +289,8 @@ LGPL License Terms @ref lgpl_license
 #define RCC_APB1RSTR_BKPRST			(1 << 27)
 #define RCC_APB1RSTR_CAN2RST			(1 << 26) /* (**) */
 #define RCC_APB1RSTR_CAN1RST			(1 << 25) /* (**) */
-#define RCC_APB1RSTR_CANRST			(1 << 25) /* (XX) Alias for CAN1RST */
+#define RCC_APB1RSTR_CANRST			(1 << 25) /* (XX) Alias for
+							     CAN1RST */
 #define RCC_APB1RSTR_USBRST			(1 << 23) /* (XX) */
 #define RCC_APB1RSTR_I2C2RST			(1 << 22)
 #define RCC_APB1RSTR_I2C1RST			(1 << 21)
@@ -358,7 +362,8 @@ LGPL License Terms @ref lgpl_license
 #define RCC_APB1ENR_BKPEN			(1 << 27)
 #define RCC_APB1ENR_CAN2EN			(1 << 26) /* (**) */
 #define RCC_APB1ENR_CAN1EN			(1 << 25) /* (**) */
-#define RCC_APB1ENR_CANEN			(1 << 25) /* (XX) Alias for CAN1EN */
+#define RCC_APB1ENR_CANEN			(1 << 25) /* (XX) Alias for
+							     CAN1EN */
 #define RCC_APB1ENR_USBEN			(1 << 23) /* (XX) */
 #define RCC_APB1ENR_I2C2EN			(1 << 22)
 #define RCC_APB1ENR_I2C1EN			(1 << 21)
@@ -6,7 +6,8 @@

@version 1.0.0

-@author @htmlonly &copy; @endhtmlonly 2009 Piotr Esden-Tempski <piotr@esden.net>
+@author @htmlonly &copy; @endhtmlonly 2009
+Piotr Esden-Tempski <piotr@esden.net>

@date 11 March 2013

@@ -131,9 +132,9 @@ LGPL License Terms @ref lgpl_license
 #define USB_EP_SETUP		0x0800 /* Setup transaction completed */
 #define USB_EP_TYPE		0x0600 /* Endpoint type */
 #define USB_EP_KIND		0x0100 /* Endpoint kind.
-                               * When set and type=bulk    -> double buffer
-                               * When set and type=control -> status out
-                               */
+				* When set and type=bulk    -> double buffer
+				* When set and type=control -> status out
+				*/

 #define USB_EP_TX_CTR		0x0080 /* Correct transfer TX */
 #define USB_EP_TX_DTOG		0x0040 /* Data toggle TX */