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First coarse run to fix coding style in locm3.

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Added --terse and --mailback options to the make stylecheck target. It
also does continue even if it enounters a possible error.

We decided on two exceptions from the linux kernel coding standard:
- Empty wait while loops may end with ; on the same line.
- All blocks after while, if, for have to be in brackets even if they
  only contain one statement. Otherwise it is easy to introduce an
  error.

Checkpatch needs to be adapted to reflect those changes.
This commit is contained in:
Piotr Esden-Tempski
2013-06-12 17:44:07 -07:00
parent 48e0f3326b
commit 7df63fcae0
147 changed files with 3323 additions and 2565 deletions
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2
include/libopencm3/lpc17xx/gpio.h
View File

@@ -151,7 +151,7 @@ LGPL License Terms @ref lgpl_license
BEGIN_DECLS
void gpio_set(u32 gpioport, u32 gpios);
void gpio_clear(u32 gpioport, u32 gpios);
void gpio_clear(u32 gpioport, u32 gpios);
END_DECLS

20
include/libopencm3/lpc17xx/memorymap.h
View File

@@ -33,12 +33,12 @@
/* APB0 */
#define WDT_BASE (PERIPH_BASE_APB0 + 0x00000)
#define TIMER0_BASE (PERIPH_BASE_APB0 + 0x04000)
#define TIMER0_BASE (PERIPH_BASE_APB0 + 0x04000)
#define TIMER1_BASE (PERIPH_BASE_APB0 + 0x08000)
#define UART0_BASE (PERIPH_BASE_APB0 + 0x0c000)
#define UART1_BASE (PERIPH_BASE_APB0 + 0x10000)
#define UART0_BASE (PERIPH_BASE_APB0 + 0x0c000)
#define UART1_BASE (PERIPH_BASE_APB0 + 0x10000)
/* PERIPH_BASE_APB0 + 0X14000 (0x4001 4000 - 0x4001 7FFF): Reserved */
#define PWM1_BASE (PERIPH_BASE_APB0 + 0x18000)
#define PWM1_BASE (PERIPH_BASE_APB0 + 0x18000)
#define I2C0_BASE (PERIPH_BASE_APB0 + 0x1c000)
#define SPI_BASE (PERIPH_BASE_APB0 + 0x20000)
#define RTC_BASE (PERIPH_BASE_APB0 + 0x24000)
@@ -46,13 +46,13 @@
#define PINCONNECT_BASE (PERIPH_BASE_APB0 + 0x2c000)
#define SSP1_BASE (PERIPH_BASE_APB0 + 0x30000)
#define ADC_BASE (PERIPH_BASE_APB0 + 0x34000)
#define CANAFRAM_BASE (PERIPH_BASE_APB0 + 0x38000)
#define CANAFREG_BASE (PERIPH_BASE_APB0 + 0x3C000)
#define CANCOMMONREG_BASE (PERIPH_BASE_APB0 + 0x40000)
#define CAN1_BASE (PERIPH_BASE_APB0 + 0x44000)
#define CAN2_BASE (PERIPH_BASE_APB0 + 0x48000)
#define CANAFRAM_BASE (PERIPH_BASE_APB0 + 0x38000)
#define CANAFREG_BASE (PERIPH_BASE_APB0 + 0x3C000)
#define CANCOMMONREG_BASE (PERIPH_BASE_APB0 + 0x40000)
#define CAN1_BASE (PERIPH_BASE_APB0 + 0x44000)
#define CAN2_BASE (PERIPH_BASE_APB0 + 0x48000)
/* PERIPH_BASE_APB0 + 0X4C000 (0x4004 C000 - 0x4005 BFFF): Reserved */
#define I2C1_BASE (PERIPH_BASE_APB0 + 0x5C000)
#define I2C1_BASE (PERIPH_BASE_APB0 + 0x5C000)
/* PERIPH_BASE_APB0 + 0X60000 (0x6000 0000 - 0x4007 BFFF): Reserved */
/* AHB */