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First coarse run to fix coding style in locm3.

Browse Source 
Added --terse and --mailback options to the make stylecheck target. It
also does continue even if it enounters a possible error.

We decided on two exceptions from the linux kernel coding standard:
- Empty wait while loops may end with ; on the same line.
- All blocks after while, if, for have to be in brackets even if they
  only contain one statement. Otherwise it is easy to introduce an
  error.

Checkpatch needs to be adapted to reflect those changes.
This commit is contained in:
Piotr Esden-Tempski
2013-06-12 17:44:07 -07:00
parent 48e0f3326b
commit 7df63fcae0
147 changed files with 3323 additions and 2565 deletions
Download Patch File Download Diff File Expand all files Collapse all files

6
include/libopencm3/lm4f/gpio.h
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@@ -6,8 +6,10 @@
*
* @version 1.0.0
*
* @author @htmlonly &copy; @endhtmlonly 2011 Gareth McMullin <gareth@blacksphere.co.nz>
* @author @htmlonly &copy; @endhtmlonly 2013 Alexandru Gagniuc <mr.nuke.me@gmail.com>
* @author @htmlonly &copy; @endhtmlonly 2011
* Gareth McMullin <gareth@blacksphere.co.nz>
* @author @htmlonly &copy; @endhtmlonly 2013
* Alexandru Gagniuc <mr.nuke.me@gmail.com>
*
* @date 16 March 2013
*

12
include/libopencm3/lm4f/nvic.h
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@@ -1,12 +1,14 @@
/** @defgroup nvic_defines Nested Vectored Interrupt Controller
@brief <b>Defined Constants and Types for the LM4F Nested Vectored Interrupt Controller</b>
@brief <b>Defined Constants and Types for the LM4F Nested Vectored Interrupt
Controller</b>
@ingroup LM4Fxx_defines
@version 1.0.0
@author @htmlonly &copy; @endhtmlonly 2012 Alexandru Gagniuc <mr.nuke.me@gmail.com>
@author @htmlonly &copy; @endhtmlonly 2012
Alexandru Gagniuc <mr.nuke.me@gmail.com>
@date 10 March 2013
@@ -40,9 +42,9 @@ LGPL License Terms @ref lgpl_license
#include <libopencm3/cm3/nvic.h>
/** @ingroup nvic_defines
* The LM3S interrupt table applies to the LM4F as well.
* Some interrupt vectors marked as reserved in LM3S are used in LM4F, and some
* vectors in LM3S are marked reserved for LM4F. However, the common vectors are
* The LM3S interrupt table applies to the LM4F as well. Some interrupt
* vectors marked as reserved in LM3S are used in LM4F, and some vectors in
* LM3S are marked reserved for LM4F. However, the common vectors are
* identical, and we can safely use the same interrupt table. Reserved vectors
* will never be triggered, so having them is perfectly safe.
*/

3
include/libopencm3/lm4f/rcc.h
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@@ -6,7 +6,8 @@
@version 1.0.0
@author @htmlonly &copy; @endhtmlonly 2012 Alexandru Gagniuc <mr.nuke.me@gmail.com>
@author @htmlonly &copy; @endhtmlonly 2012
Alexandru Gagniuc <mr.nuke.me@gmail.com>
@date 10 March 2013

9
include/libopencm3/lm4f/systemcontrol.h
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@@ -6,7 +6,8 @@
@version 1.0.0
@author @htmlonly &copy; @endhtmlonly 2012 Alexandru Gagniuc <mr.nuke.me@gmail.com>
@author @htmlonly &copy; @endhtmlonly 2012
Alexandru Gagniuc <mr.nuke.me@gmail.com>
@date 10 March 2013
@@ -726,9 +727,9 @@ typedef enum {
} clken_t;
/* =============================================================================
/* ============================================================================
* Function prototypes
* ---------------------------------------------------------------------------*/
* --------------------------------------------------------------------------*/
BEGIN_DECLS
void periph_clock_enable(clken_t periph);
@@ -740,5 +741,3 @@ END_DECLS
#endif /* LM4F_SYSTEMCONTROL_H */

15
include/libopencm3/lm4f/uart.h
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@@ -6,7 +6,8 @@
*
* @version 1.0.0
*
* @author @htmlonly &copy; @endhtmlonly 2013 Alexandru Gagniuc <mr.nuke.me@gmail.com>
* @author @htmlonly &copy; @endhtmlonly 2013
* Alexandru Gagniuc <mr.nuke.me@gmail.com>
*
* @date 07 May 2013
*
@@ -479,7 +480,8 @@ void uart_set_fifo_trigger_levels(u32 uart,
* @param[in] uart UART block register address base @ref uart_reg_base
*/
static inline
bool uart_is_tx_fifo_full(u32 uart) {
bool uart_is_tx_fifo_full(u32 uart)
{
return UART_FR(uart) & UART_FR_TXFF;
}
@@ -490,7 +492,8 @@ bool uart_is_tx_fifo_full(u32 uart) {
* @param[in] uart UART block register address base @ref uart_reg_base
*/
static inline
bool uart_is_tx_fifo_empty(u32 uart) {
bool uart_is_tx_fifo_empty(u32 uart)
{
return UART_FR(uart) & UART_FR_TXFE;
}
@@ -500,7 +503,8 @@ bool uart_is_tx_fifo_empty(u32 uart) {
* @param[in] uart UART block register address base @ref uart_reg_base
*/
static inline
bool uart_is_rx_fifo_full(u32 uart) {
bool uart_is_rx_fifo_full(u32 uart)
{
return UART_FR(uart) & UART_FR_RXFF;
}
@@ -510,7 +514,8 @@ bool uart_is_rx_fifo_full(u32 uart) {
* @param[in] uart UART block register address base @ref uart_reg_base
*/
static inline
bool uart_is_rx_fifo_empty(u32 uart) {
bool uart_is_rx_fifo_empty(u32 uart)
{
return UART_FR(uart) & UART_FR_RXFE;
}
/**@}*/

42
include/libopencm3/lm4f/usb.h
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@@ -41,15 +41,15 @@
#include <libopencm3/lm4f/memorymap.h>
#include <libopencm3/cm3/common.h>
/* =============================================================================
/* ============================================================================
* USB registers
* ---------------------------------------------------------------------------*/
* --------------------------------------------------------------------------*/
/* USB Device Functional Address */
#define USB_FADDR MMIO8 (USB_BASE + 0x00)
#define USB_FADDR MMIO8(USB_BASE + 0x00)
/* USB Power */
#define USB_POWER MMIO8 (USB_BASE + 0x01)
#define USB_POWER MMIO8(USB_BASE + 0x01)
/* USB Transmit Interrupt Status */
#define USB_TXIS MMIO16(USB_BASE + 0x02)
@@ -64,19 +64,19 @@
#define USB_RXIE MMIO16(USB_BASE + 0x08)
/* USB General Interrupt Status */
#define USB_IS MMIO8 (USB_BASE + 0x0A)
#define USB_IS MMIO8(USB_BASE + 0x0A)
/* USB Interrupt Enable */
#define USB_IE MMIO8 (USB_BASE + 0x0B)
#define USB_IE MMIO8(USB_BASE + 0x0B)
/* USB Frame Value */
#define USB_FRAME MMIO16(USB_BASE + 0x0C)
/* USB Endpoint Index */
#define USB_EPIDX MMIO8 (USB_BASE + 0x0E)
#define USB_EPIDX MMIO8(USB_BASE + 0x0E)
/* USB Test Mode */
#define USB_TEST MMIO8 (USB_BASE + 0x0F)
#define USB_TEST MMIO8(USB_BASE + 0x0F)
/* USB FIFO Endpoint [0-7] */
#define USB_FIFO8(n) MMIO8(USB_BASE + 0x20 + n*0x04)
@@ -84,10 +84,10 @@
#define USB_FIFO32(n) MMIO32(USB_BASE + 0x20 + n*0x04)
/* USB Transmit Dynamic FIFO Sizing */
#define USB_TXFIFOSZ MMIO8 (USB_BASE + 0x62)
#define USB_TXFIFOSZ MMIO8(USB_BASE + 0x62)
/* USB Receive Dynamic FIFO Sizing */
#define USB_RXFIFOSZ MMIO8 (USB_BASE + 0x63)
#define USB_RXFIFOSZ MMIO8(USB_BASE + 0x63)
/* USB Transmit FIFO Start Address */
#define USB_TXFIFOADD MMIO16(USB_BASE + 0x64)
@@ -96,40 +96,40 @@
#define USB_RXFIFOADD MMIO16(USB_BASE + 0x66)
/* USB Connect Timing */
#define USB_CONTIM MMIO8 (USB_BASE + 0x7A)
#define USB_CONTIM MMIO8(USB_BASE + 0x7A)
/* USB Full-Speed Last Transaction to End of Frame Timing */
#define USB_FSEOF MMIO8 (USB_BASE + 0x7D)
#define USB_FSEOF MMIO8(USB_BASE + 0x7D)
/* USB Low-Speed Last Transaction to End of Frame Timing */
#define USB_LSEOF MMIO8 (USB_BASE + 0x7E)
#define USB_LSEOF MMIO8(USB_BASE + 0x7E)
/* USB Control and Status Endpoint 0 Low */
#define USB_CSRL0 MMIO8 (USB_BASE + 0x102)
#define USB_CSRL0 MMIO8(USB_BASE + 0x102)
/* USB Control and Status Endpoint 0 High */
#define USB_CSRH0 MMIO8 (USB_BASE + 0x103)
#define USB_CSRH0 MMIO8(USB_BASE + 0x103)
/* USB Receive Byte Count Endpoint 0 */
#define USB_COUNT0 MMIO8 (USB_BASE + 0x108)
#define USB_COUNT0 MMIO8(USB_BASE + 0x108)
/* USB Maximum Transmit Data Endpoint [1-7] */
#define USB_TXMAXP(n) MMIO16(USB_BASE + 0x100 + n*0x10)
/* USB Transmit Control and Status Endpoint [1-7] Low */
#define USB_TXCSRL(n) MMIO8 (USB_BASE + 0x102 + n*0x10)
#define USB_TXCSRL(n) MMIO8(USB_BASE + 0x102 + n*0x10)
/* USB Transmit Control and Status Endpoint [1-7] High */
#define USB_TXCSRH(n) MMIO8 (USB_BASE + 0x103 + n*0x10)
#define USB_TXCSRH(n) MMIO8(USB_BASE + 0x103 + n*0x10)
/* USB Maximum Receive Data Endpoint [1-7] */
#define USB_RXMAXP(n) MMIO16(USB_BASE + 0x104 + n*0x10)
/* USB Receive Control and Status Endpoint [1-7] Low */
#define USB_RXCSRL(n) MMIO8 (USB_BASE + 0x106 + n*0x10)
#define USB_RXCSRL(n) MMIO8(USB_BASE + 0x106 + n*0x10)
/* USB Receive Control and Status Endpoint [1-7] High */
#define USB_RXCSRH(n) MMIO8 (USB_BASE + 0x107 + n*0x10)
#define USB_RXCSRH(n) MMIO8(USB_BASE + 0x107 + n*0x10)
/* USB Receive Byte Count Endpoint [1-7] */
#define USB_RXCOUNT(n) MMIO16(USB_BASE + 0x108 + n*0x10)
@@ -419,4 +419,4 @@ END_DECLS
/**@}*/
#endif /* LIBOPENCM3_LM4F_USB_H */
#endif /* LIBOPENCM3_LM4F_USB_H */