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doc: stm32l0: rcc: add groups and tags for bus prescalers

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Karl Palsson
2019-06-12 22:08:29 +00:00
parent 5eefc214f6
commit 7b6ca4be6b
1 changed files with 9 additions and 0 deletions
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9
include/libopencm3/stm32/l0/rcc.h
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@@ -171,24 +171,32 @@
#define RCC_CFGR_STOPWUCK_HSI16 (1<<15) #define RCC_CFGR_STOPWUCK_HSI16 (1<<15)
/* PPRE2: APB high-speed prescaler (APB2) */ /* PPRE2: APB high-speed prescaler (APB2) */
/** @defgroup rcc_cfgr_apb2pre RCC_CFGR APB2 prescale Factors
@{*/
#define RCC_CFGR_PPRE2_NODIV 0x0 #define RCC_CFGR_PPRE2_NODIV 0x0
#define RCC_CFGR_PPRE2_DIV2 0x4 #define RCC_CFGR_PPRE2_DIV2 0x4
#define RCC_CFGR_PPRE2_DIV4 0x5 #define RCC_CFGR_PPRE2_DIV4 0x5
#define RCC_CFGR_PPRE2_DIV8 0x6 #define RCC_CFGR_PPRE2_DIV8 0x6
#define RCC_CFGR_PPRE2_DIV16 0x7 #define RCC_CFGR_PPRE2_DIV16 0x7
/**@}*/
#define RCC_CFGR_PPRE2_MASK 0x7 #define RCC_CFGR_PPRE2_MASK 0x7
#define RCC_CFGR_PPRE2_SHIFT 11 #define RCC_CFGR_PPRE2_SHIFT 11
/* PPRE1: APB low-speed prescaler (APB1) */ /* PPRE1: APB low-speed prescaler (APB1) */
/** @defgroup rcc_cfgr_apb1pre RCC_CFGR APB1 prescale Factors
@{*/
#define RCC_CFGR_PPRE1_NODIV 0x0 #define RCC_CFGR_PPRE1_NODIV 0x0
#define RCC_CFGR_PPRE1_DIV2 0x4 #define RCC_CFGR_PPRE1_DIV2 0x4
#define RCC_CFGR_PPRE1_DIV4 0x5 #define RCC_CFGR_PPRE1_DIV4 0x5
#define RCC_CFGR_PPRE1_DIV8 0x6 #define RCC_CFGR_PPRE1_DIV8 0x6
#define RCC_CFGR_PPRE1_DIV16 0x7 #define RCC_CFGR_PPRE1_DIV16 0x7
/**@}*/
#define RCC_CFGR_PPRE1_MASK 0x7 #define RCC_CFGR_PPRE1_MASK 0x7
#define RCC_CFGR_PPRE1_SHIFT 8 #define RCC_CFGR_PPRE1_SHIFT 8
/* HPRE: AHB prescaler */ /* HPRE: AHB prescaler */
/** @defgroup rcc_cfgr_ahbpre RCC_CFGR AHB prescale Factors
@{*/
#define RCC_CFGR_HPRE_NODIV 0x0 #define RCC_CFGR_HPRE_NODIV 0x0
#define RCC_CFGR_HPRE_DIV2 0x8 #define RCC_CFGR_HPRE_DIV2 0x8
#define RCC_CFGR_HPRE_DIV4 0x9 #define RCC_CFGR_HPRE_DIV4 0x9
@@ -198,6 +206,7 @@
#define RCC_CFGR_HPRE_DIV128 0xd #define RCC_CFGR_HPRE_DIV128 0xd
#define RCC_CFGR_HPRE_DIV256 0xe #define RCC_CFGR_HPRE_DIV256 0xe
#define RCC_CFGR_HPRE_DIV512 0xf #define RCC_CFGR_HPRE_DIV512 0xf
/**@}*/
#define RCC_CFGR_HPRE_MASK 0xf #define RCC_CFGR_HPRE_MASK 0xf
#define RCC_CFGR_HPRE_SHIFT 4 #define RCC_CFGR_HPRE_SHIFT 4